A Complete Computer vision system can be divided into two main categories: detection and classification. The Lane detection algorithm is a part of the computer vision detection category and has been applied in autonomous driving and smart vehicle systems. The lane detection system is responsible for lane marking in a complex road environment. At the same time, lane detection plays a crucial role in the warning system for a car when departs the lane. The implemented lane detection algorithm is mainly divided into two steps: edge detection and line detection. In this paper, we will compare the state-of-the-art implementation performance obtained with both FPGA and GPU to evaluate the trade-off for latency, power consumption, and utilization. Our comparison emphasises the advantages and disadvantages of the two systems.
The two fundamental components of a complete computer vision system are detection and classification. The Lane detection algorithm, which is used in autonomous driving and smart vehicle systems, is within the computer vision detection area. In a sophisticated road environment, lane marking is the responsibility of the lane detection system. The warning system for a car that leaves its lane also heavily relies on lane detection. The two primary stages of the implemented lane detection algorithm are edge detection and line detection. In order to assess the trade-offs for latency, power consumption, and utilisation, we will compare the state-of-the-art implementation performance attained with both FPGA and GPU in this work. Our analysis highlights the benefits and drawbacks of the two systems.
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