A paradigm-shifting design strategy is demonstrated that unifies the treatment of electronic and conformational properties of polymer dielectrics for concurrent high electric field and elevated temperature harsh conditions.

Charging of insulators modifies local electric field distribution and increases potential threat to the safety of the gas insulated equipment. In this paper, surface charge tailoring techniques are classified and reviewed by introducing a Dam-flood model. Technical solutions of different charge tailoring methods are compared and discussed. The outlook of potential solutions to suppress charge accumulation is recommended and discussed based on industrial consideration.This paper serves as a guide handbook for engineers and researchers into the study of charge tailoring methods.Meanwhile, we hope that the content of this paper could shed some lights upon charge-free insulators to promote the industrial application of HVDC GIL/GIS.

Fundamental studies of potential candidates for DC electric power transmission in high temperature environment, including ETFE, FEP, PTFE, PI and PEEK, are carried out and presented in form of the series papers containing space charge and conduction as part I, partial discharge as part II, and the degradation and surface breakdown as part III. In this part, the space charge at 20kV/mm was measured at 25 °C and with a thermal gradient at 50 °C. The electrical conductivity was measured at electric fields ranging from 10kV/mm to 30kV/mm in temperatures ranging from 25 °C to 200 °C. The experimental results showed that considering the effect of thermal condition and electric field, FEP has the lowest total amount of space charge accumulation and electric field distortion among these materials at the measured conditions. PI and PEEK have the lowest amount of trap-controlled mobility at 25 °C due to deeper average trap level because of the aromatic rings in the structure. PTFE and PI have the lowest amount of thermal activation energy and temperature-dependent electrical conductivity due to the more uniform morphological phase comparing to ETFE, FEP, and PEEK. The outcomes of this paper serve as a benchmark for the fundamental researches over high temperature materials for DC applications and lay a basis for Part II and Part III.

It is an urgent requirement to suppress surface partial discharge (PD) activities of dielectrics for modern electrical and electronic devices. Here, we introduce a method to mitigate the surface PD in a manner of tailoring insulation surface conductivity. A surface coating with a conductivity ranging from 10−13 to 10−10 S is developed to regulate the surface charge migration in the vicinity of the triple junction and to suppress effectively the surface PD activity. The excellent performance of this coating provides an approach for surface PD suppression at DC voltage, which has great application potential in the insulation design of DC electric power equipment, DC generators, power electronic devices, printed circuit board (PCB) layout, and various integrated electrostatic sensors and actuators.

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