This document describes a successful application of a semi-formal test generation technique to the verification of Direct Memory Access Controller (DMAC) of ST50, a new general purpose RISC microprocessor developed by STMicroelectronics and Hitachi. Like other memory-related devices, the DMA controller challenges formal techniques because of the state explosion problem. To cope with the challenge, abstraction mechanism is applied during test generation: several abstract models are created in order to verify different functional aspects of the design. We also propose a practical solution to overcome a temporal abstraction problem that arises when tests issued from an abstract model have to be applied during real design simulation. Abstract Model for AAAA resource selection mode resource selection mode Abstract Model for AAAP Abstract Model for AAPA resource selection mode Abstract Model for PPPP resource selection mode Abstract Model for AAAA resource selection mode Abstract Model for AAAP resource selection mode Abstract Model for AAPA resource selection mode Abstract Model for PPPP resource selection mode ABSTRACT DMAC MODEL
This paper describes the first application of the Genevieve test generation methodology. The Genevieve approach uses semi-formal techniques derived from "model-checking" to generate test suites for specific behaviours of the design under test. An "interesting" behaviour is claimed to be unreachable. If a path from an initial state to the state of interest does exist, a counter-example is generated. The sequence of states specifies a test for the desired behaviour.To highlight real problems that could appear during test generation, we chose the Store Data Unit (SDU) of the ST100, a new high performance digital signal processor (DSP) developed by STMicroelectronics. This unit is specifically selected because of the following key issues: 1. big data structures that can not be directly modelled without state explosion, 2. complex control logic that would require an excessive number of tests to exercise exhaustively, 3. a design where it is difficult to determine how to drive the complete system to ensure a given behaviour in the unit under test.The Genvieve methodology allowed us to define a coverage model specifically devoted to covering corner cases of the design. Hence the generated test suite achieved very efficient coverage of corner cases, and checked not only functional correctness but also whether the implementation matched design intent. As a result the Genevieve tests discovered some subtle performance bugs which would otherwise be very difficult to find.
The goal in developing the Interval Programming (IvP) model is to provide an alternative mathematical programming model for rapid global optimization of multiple nonlinear objective functions that offers a unique new balance between expressive power, speed and accuracy. Interval Programming provides a means for modeling objectives, in unlimited form, over an extremely large design space, as well as a solution method with a guarantee of globally optimal solutions.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.