Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas. However, current approaches are not compatible with high-volume manufacturing on wafer level. Here, we report a generic methodology for large-area integration of 2D materials by adhesive wafer bonding. Our approach avoids manual handling and uses equipment, processes, and materials that are readily available in large-scale semiconductor manufacturing lines. We demonstrate the transfer of CVD graphene from copper foils (100-mm diameter) and molybdenum disulfide (MoS2) from SiO2/Si chips (centimeter-sized) to silicon wafers (100-mm diameter). Furthermore, we stack graphene with CVD hexagonal boron nitride and MoS2 layers to heterostructures, and fabricate encapsulated field-effect graphene devices, with high carrier mobilities of up to $$4520\;{\mathrm{cm}}^2{\mathrm{V}}^{ - 1}{\mathrm{s}}^{ - 1}$$ 4520 cm 2 V − 1 s − 1 . Thus, our approach is suited for backend of the line integration of 2D materials on top of integrated circuits, with potential to accelerate progress in electronics, photonics, and sensing.

We report the observation of the generation and routing of single plasmons generated by localized excitons in a WSe monolayer flake exfoliated onto lithographically defined Au-plasmonic waveguides. Statistical analysis of the position of different quantum emitters shows that they are (3.3 ± 0.7) times more likely to form close to the edges of the plasmonic waveguides. By characterizing individual emitters, we confirm their single-photon character via the observation of antibunching in the signal ( g(0) = 0.42) and demonstrate that specific emitters couple to modes of the proximal plasmonic waveguide. Time-resolved measurements performed on emitters close to and far away from the plasmonic nanostructures indicate that Purcell factors up to 15 ± 3 occur, depending on the precise location of the quantum emitter relative to the tightly confined plasmonic mode. Measurement of the point spread function of five quantum emitters relative to the waveguide with <50 nm precision is compared with numerical simulations to demonstrate the potential for greater increases in the coupling efficiency for ideally positioned emitters. The integration of such strain-induced quantum emitters with deterministic plasmonic routing is a step toward deep-subwavelength on-chip single quantum light sources.

Platinum diselenide (PtSe 2 ) is a 2D material with outstanding electronic and piezoresistive properties. The material can be grown at low temperatures in a scalable manner, which makes it extremely appealing for many potential electronics, photonics, and sensing applications. Here, the nanocrystalline structure of different PtSe 2 thin films grown by thermally assisted conversion (TAC) is investigated and is correlated with their electronic and piezoresistive properties. Scanning transmission electron microscopy for structural analysis, X-ray photoelectron spectroscopy (XPS) for chemical analysis, and Raman spectroscopy for phase identification are used. Electronic devices are fabricated using transferred PtSe 2 films for electrical characterization and piezoresistive gauge factor measurements. The variations of crystallite size and their orientations are found to have a strong correlation with the electronic and piezoresistive properties of the films, especially the sheet resistivity and the effective charge carrier mobility. The findings may pave the way for tuning and optimizing the properties of TAC-grown PtSe 2 toward numerous applications.

2D materials display very promising intrinsic material properties, with multiple applications in electronics, photonics, and sensing. In particular layered platinum diselenide has shown high potential due to its layer-dependent tunable bandgap, low-temperature growth, and high environmental stability. Here, the conformal and area selective (AS) low-temperature growth of layered PtSe 2 is presented defining a new paradigm for 2D material integration. The thermally-assisted conversion of platinum which is deposited by AS atomic layer deposition to PtSe 2 is demonstrated on various substrates with a distinct 3D topography. Further the viability of the approach is presented by successful on-chip integration of hybrid semiconductor devices, namely by the manufacture of a highly sensitive ammonia sensors channel with 3D topography and fully integrated infrared-photodetectors on silicon photonics waveguides. The presented methodologies of conformal and AS growth therefore lay the foundation for new design routes for the synthesis of more complex hybrid structures with 2D materials.