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Sensors with long lifetimes create new applications in medical, infrastructure and environmental monitoring. Due to volume constraints, sensor systems are often capable of storing only small amounts of energy. Several systems have increased lifetime through V DD scaling [1][2] [3]. This necessitates voltage conversion from highervoltage storage elements, such as batteries and fuel cells. Power is reduced by introducing ultra-low-power sleep modes during idle periods. Sensor lifetime can be further extended by harvesting from solar, vibrational and thermal energy. Since the availability of harvested energy is sporadic, it must be detected and stored. Harvesting sources often do not provide suitable voltage levels, so DC-DC up-conversion is required.An 8.75mm3 sensor platform capable of nearly-perpetual operation is proposed. The system includes a 73kHz near-threshold ARM Cortex-M3 core that is powered by two series-connected 1mm 2 solar cells and a Cymbet thin-film solid-state Li battery through an integrated power management unit (PMU) (Fig. 15.8.1). It is suitable for volumeconstrained long-term wireless sensing applications such as intraocular pressure monitoring to detect and track the progression of glaucoma. In the 7.7µW active state, the system collects data from on-chip temperature and capacitance sensors, performs data processing using a 16kb non-retentive SRAM (NR-SRAM) for temporary storage and writes the results to a 24kb retentive SRAM (R-SRAM) (Fig. 15.8.2). Between sensor measurements the system enters a 550pW sleep state by disabling SRAM accesses, power gating the Cortex-M3 and NR-SRAM and switching the PMU to sleep mode. While asleep, the R-SRAM, wakeup controller and sleep timer are powered by a 50Hz switched capacitor network (SCN) that converts energy from the solar cells and battery. If sufficient light is available, solar energy is used to recharge the battery. When the next sensor measurement is scheduled, the wakeup controller switches the PMU to active mode by enabling a 1.2MHz clock for the SCN and a linear regulator (LR). Then power gating is disabled, allowing data collection and processing to begin.The Cortex-M3 achieves 73kHz operation at 400mV and 1MHz at 500mV while running a 64-point DFT program ( Fig. 15.8.3). The energy-optimal point for active mode operation is 2.1µW at 400mV, because further voltage scaling increases total energy consumption due to excessive leakage [4]. During sleep mode, the processor and NR-SRAM are power gated. When the system enters active mode mode, the Cortex-M3 begins program operation with pointers retained through sleep mode that denote the program location and allocated R-SRAM for sensor measurements. The sleep power is 100pW at 400mV and 460pW at 500mV, including R-SRAM, wakeup controller and balloon latch leakage plus sleep timer switching power. The idle processor lifetime is 49 years based on the 12μAh 2.9mm 3 Cymbet battery, which included in the system volume of this work.A custom SRAM was developed to minimize leakage power during sleep mode...

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