This paper presents a 1Tb/s 3W inter-chip transceiver. The data rate is the highest and the power dissipation is the lowest among transceiver chips reported previously at ISSCC (Fig. 23.4.1). Both clock and data are transmitted by inductive coupling. The clock frequency is 1GHz and data rate per channel is 1Gb/s. 1024 data transceivers are arranged with a pitch of 30µm. The total layout area for the clock and data transceivers is 2mm 2 in 0.18µm CMOS and the chip thickness is 10µm. Time Division Multiple Access (TDMA) using 4 phases reduces crosstalk effectively. The measured Bit Error Rate (BER) is lower than 10 -12 . Bi-Phase Modulation (BPM) is employed to improve noise immunity, resulting in reduced power dissipation in the transceiver.

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State of shock, deteriorated consciousness level, chronic obstructive lung disease, ischemic heart disease, hemorrhage requiring blood transfusion, age over 80 years, cardiovascular surgery, surgeries at night, and surgeries of duration more than 2 h cause patients to be strongly susceptible to postoperative mortality or morbidity in emergency surgeries.

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Characteristics of hafnium silicate as gate dielectric in n-GaN capacitors were investigated. The Hf0.57Si0.43Ox, Hf0.64Si0.36Ox and HfO2 films exhibited high dielectric constants of 15.4, 15.9, and 17.6, respectively. The Hf0.57Si0.43Ox and Hf0.64Si0.36Ox films, which had an amorphous structure, showed superior properties, including a minimal flatband voltage (Vfb) hysteresis (≤70 mV) and a small Vfb shift (≤−0.45 V), as well as a low interface state density (~4 × 1011 cm−2 eV−1 at −0.4 eV from conduction band), and a high breakdown electric field (≥8.6 MV cm−1) compared to those of a polycrystalline HfO2 film.