The authors propose a four-quadrant multiplier based on a core cell that exploits the general relationship between the saturation current of an MOS transistor and the source inversion charge density, valid from weak to strong inversion. The advantages of the proposed circuit are simplicity, low distortion and feasibility of low-voltage operation. Experimental results in a 0.35 mm CMOS prototype indicate 1 mA consumption for 1 MHz bandwidth, and distortion level below 1% for an input current of 80% of the full-scale range. The multiplier core area is around 10 000 mm 2 .
This paper presents a comprehensive review of the state of the art for oscillators operating at reduced supply voltage. The analysis and implementation examples of differ-ent types of oscillators, such as LC oscillators, transformer-based oscillators, and CMOS oscillators are presented. Expres-sions for the oscillation frequency and the minimum supply voltage limit are provided. The characteristics, advantages, and constrains of different topologies are discussed, providing a reference guideline for the choice of the best topology for a given application.
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