Purpose The life cycle assessment of silicon wafer processing for microelectronic chips and solar cells aims to provide current and comprehensive data. In view of the very fast market developments, for solar cell fabrication the influence of technology and capacity variations on the overall environmental impact was also investigated and the data were compared with the widely used ecoinvent data. Methods Existing material flow models for silicon wafer processing for microelectronic chips and solar cells used for engineering and planning formed a starting point for this analysis. The models represent an average of widely used processes and associated process equipment. The resulting input/output tables formed the data basis for the life cycle assessment. This is a cradle-to-gate investigation, consisting of primary gate-to-gate data for wafer processing. The upstream processes of the necessary inputs were supplemented with data from ecoinvent v2.0. Subsequent manufacturing steps, utilization, and waste disposal of the final products were not included. The software used for creating the inventory and impact assessment was Umberto version 5.5. The Impact 2002+ method was applied for impact assessment. Results For both semiconductor and solar cell fabrication, energy consumption and upstream chemicals production are most relevant for the overall potential environmental impact when only the gate-to-gate processes are considered. The upstream process for wafer production is dominant in solar cell fabrication, but exerts little influence on semiconductor fabrication. In the case of semiconductor fabrication, a comparison with the present ecoinvent dataset "wafer, fabricated, for integrated circuit, at plant" shows large differences. Conclusions In the case of silicon solar cells, the results of this study and the ecoinvent data are very similar and the impact of different fabrication processes appears to be minor.
In semiconductor and crystalline silicon solar cell fabrication, volatile organic compound (VOC) abatement is state of the art and obligatory in many countries. Thermal or catalytic oxidation is used as the preferred reduction technique in this field. Because of low concentrated exhaust gas, oxidation needs additional energy which is not to be ignored. Against the background of resource depletion, the question arises whether, from an environmental point of view, treatment is more beneficial than the direct release of emissions. The overall potential environmental impact of several scenarios has been investigated using a method based on Life Cycle Assessment (LCA). The results show that below an exhaust concentration of 600 mg/m 3 for semiconductor fabrication and below 1500 mg/m 3 of nontoxic solvents for solar cell fabrication, exhaust conditioning causes a greater potential environmental impact than the direct release without any treatment.
Reduction of Hydrocarbon Emissions in Solar Cell Fabrication -A Life Cylce AssessmentUsing a life cycle assessment various technological options to reduce hydrocarbon emissions in solar cell fabrication are studied. Here, the combustion process causes much more potential environmental impacts than the condensation or the biofilter. Compared with the direct emission of untreated exhaust air to the surroundings area, it is shown by the studied treatment methods that the intended reduction of health impacts is more than offset. The aim of the integrated pollution prevention and control directive of protecting the environment as a whole is not fulfilled by these methods.
Yield control in manufacturing of microelectronic devices is closely related to defect control and contamination control. For a proper definition of process windows, e.g. maximum sit time or minimum quality of used process materials, the impact of different kinds of contamination on device performance has to be determined. This paper describes the outline of a strategy that was used for an estimation of the impact of organic airborne molecular contamination (AMC) on a realistic device process on the basis of selected experimental results: A manufacturing process was performed using intentionally contaminated substrates, monitoring measures were installed and baseline-levels were determined, time-dependent effects were detected, and process windows were defined on the basis of calculations. A gate-oxide integrity test was performed using intentionally contaminated silicon wafers. Contamination was performed via the gas phase using individual organic compounds. This test indicates that, besides the overall concentration of organic airborne molecular contamination, also the additional presence of small amounts of individual organic compounds has an effect on gate-oxide quality. The installation of measures for the monitoring of organic contamination using GasChromatography/Mass-Spectrometry (GC/MS) or Time-of-Flight -Secondary-Ion-Mass-Spectrometry (ToF-SIMS) lead to the observation that the deposition of organic contamination onto wafer surfaces can be a very fast process. Especially the preparation of blank samples is a procedure which is complicated by this effect. For an adequate definition of process windows it is necessary to estimate the time that remains until a freshly cleaned wafer is covered by a monolayer of organic contamination. This estimation was made on the basis of calculations using gas kinetic theory. Under standard cleanroom conditions the calculated time is in the range of minutes and is strongly depending on the adsorption probability of individual organic compounds and their individual concentrations.
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