The electrical properties of p-Si/n-GaAs heterojunctions fabricated by using surface-activated bonding (SAB) were investigated by measuring their current-voltage (I-V) and capacitance-voltage (C-V) characteristics. The I-V characteristics showed rectifying properties. Their flat-band voltage obtained from C-V measurements was around 1.6 V. Observation by using field-emission-scanning electron microscopy and energy dispersive X-ray spectroscopy revealed neither structural deficits nor oxide layers at the interfaces. These results suggest that the SAB-based Si/ GaAs heterojunctions are applicable for fabricating novel devices.

junctions fabricated by surface-activated bonding (SAB) were investigated. An amorphous layer with a thickness of 3 nm was found across the bonding interface without annealing. The current-voltage (I-V) characteristics of p +-GaAs/n +-Si, p +-Si/n +-GaAs, n +-Si/n +-GaAs, and p +-Si/p +-GaAs junctions showed excellent linearity. The interface resistance of n +-Si/n +-GaAs junctions was found to be 0.112 Ω&cm 2 , which is the smallest value observed in all the samples. The resistance decreased with increasing annealing temperature and decreased to 0.074 Ω&cm 2 after the junction annealing at 400°C. These results demonstrate that n +-Si/n +-GaAs junctions are suitable for the connection of subcells in the fabrication of tandem solar cells.

Effects of annealing on surface-activated bonding (SAB)-based Si/Si junctions were investigated by transmission electron microscopy (TEM) observations and current–voltage (I–V) measurements. We observed an amorphous-like layer at the bonding interface, which was recrystallized by annealing. We extracted the potential barrier heights at Si/Si interfaces annealed at different temperatures from the results of I–V measurements at various ambient temperatures. For p-Si/p-Si junctions, the barrier height increased as the annealing temperature increased from 200 to 400 °C and decreased from 400 to 1000 °C. For n-Si/n-Si junctions, the barrier height increased as the annealing temperature increased from 200 to 600 °C and decreased from 600 to 1000 °C. By using the charge neutral level (CNL) model, we estimated the energy of CNL, ECNL, and the density of interface states, Dit, at each annealing temperature. Dit decreased as the annealing temperature increased from 400 to 1000 °C. ECNL showed values larger than the reported ones.

Electrical properties of n-Si/n-Si, p-Si/n-Si, and p À-Si/n þ-Si junctions fabricated by using surface-activated-bonding are investigated. The transmission electron microscopy/energy dispersive X-ray spectroscopy of the n-Si/n-Si interfaces reveals no evidence of oxide layers at the interfaces. From the current-voltage (I-V) and the capacitance-voltage (C-V) characteristics of the p-Si/n-Si and p À-Si/n þ-Si junctions, it is found that the interface states, likely to have formed due to the surface activation process using Ar plasma, have a more marked impact on the electrical properties of the p-Si/n-Si junctions. An analysis of the temperature dependence of the I-V characteristics indicates that the properties of carrier transport across the bonding interfaces for reverse-bias voltages in the p-Si/n-Si and p À-Si/n þ-Si junctions can be explained using the trap-assisted-tunneling and Frenkel-Poole models, respectively. V

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