Thermal laser signal injection microscopy (T-LSIM) (aka TIVA and OBIRCH) has shown considerable promise in stateof- the-art digital integrated circuits. The technique has been utilized to locate shorts, leakage currents, problem vias, and timing issues in these devices. However, little has been published on the utility of this technique for analog and mixed signal devices. In this paper we demonstrate the application of T-LSIM on two different analog devices with defects that conventional FA technology and fault isolation techniques were unable to locate. Analog devices produce several unique challenges to the basic T-LSIM technique as typically utilized in the digital regime. Extensions of the basic T-LSIM technique were utilized to locate the failures, which produced unexpected results. The T-LSIM technique has proved essential in the quick identification and localization of failure sites. The T-LSIM technique provides the failure analyst with the analytical power not previously available on conventional fault isolation tools such as emission microscopy and liquid crystal.
A case study of a transient induced latch-up (TLU) problem is presented, which was identified during the development of a 60 V, 0.8 µm BiCMOS power control device. The mechanism was characterized by controlled transient latch-up testing and found to be fairly unusual, being triggered by a fast decreasing not necessarily negative spike or glitch on the positive supply pin. Emission Microscopy (EMMI) and Transient Interferometric Mapping (TIM) successfully located the parasitic silicon controlled rectifiers (SCR) structure. TIM is an infra-red laser beam based technique for back side analysis. TIM analysis enables concurrent imaging of carrier injection and heating in nanosecond timescale providing more detailed information on the SCR action than more often used static photon emission or dynamic TLP / PICA imaging.
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