Long Term Evolution (LTE), the next generation of radio technologies designed to increase the capacity and speed of mobile networks. The future communication systems require much higher peak rate for the air interface but very short processing delay. This paper mainly focuses on to improve the processing speed and capability and decrease the processing delay of the downlink channels using the parallel processing technique. This paper proposes Parallel Processing Architecture for both transmitter and receiver for Downlink channels in 3GPP-LTE. The Processing steps include Scrambling, Modulation, Layer mapping, Precoding and Mapping to the REs in transmitter side. Similarly demapping from the REs, Decoding and Detection, Delayer mapping and Descrambling in Receiver side. Simulation is performed by using modelsim and Implementation is achieved using Plan Ahead tool and virtex 5 FPGA.Implemented results are discussed in terms of RTL design, FPGA editor, power estimation and resource estimation.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.