As new computer architectures are developed to exploit large-scale data-level parallelism, techniques are needed to retarget legacy sequential code to these platforms. Sequential programming languages force programmers to include sequential artifacts in their code, particularly with respect to how the source code expresses data references (generally assuming a linear address space). In contrast, data-parallel programs apply many operations in parallel to elements in twodimensional data sets, and a given data parallel operation can access other spatially local elements along either dimension. Of key importance in exposing data parallelism is determining these two-dimensional data dependencies among elements of a matrix. This paper presents a reverse engineering technique for identifying such dependencies in sequential image processing code, using pattern matching on an attributed dataflow representation of the program. The technique is applied to common image filtering algorithms. The technique is validated by retargeting to a Matlab program and matching the results against those of the original source.
Abstract. We describe a programming tutor framework that consists of two configurable components, a guided-planning component and an assisted-coding component that offers task relevant automatically-generated hints on demand to students. We evaluate the effectiveness of the new integrated planning and coding environment by comparing it to three other tutor conditions: planning-only, coding-only, and planning-only interleaved with planning-coding. We conclude that the integrated planning and coding tutor environment is more effective than tutored planning-only activities and that students make more efficient use of tutor feedback in the integrated environment than in the coding only environment.
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We present a system for automatically and iteratively grading student work in a Systems Administration course. This system can grade -and give feedback regarding -live (running) virtual machines the students have configured. It is appropriate for both face-to-face and online course offerings.
The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do not provide a sound specification and design methodology (SDM) because they require the designer to choose the implementation target before specification and design exploration and they do not work together coherently across development stages. This paper presents a new SDM, called MAGIC, that allows the designer to capture an executable specification model for use in design exploration to find the optimal multiprocessor technology before committing to that technology. MAGIC uses a technique called "virtual benchmarking," for early validation of promising architectures. The MAGIC SDM also exploits emerging open-standards computation and communication middleware to establish model continuity between RSP frameworks. This methodology has been validated through the specification and design of a moderately complex system representative of the signal processing domain: the RASSP Synthetic Aperture Radar benchmark. In this case study, MAGIC achieves three orders of magnitude speedup over existing virtual prototyping approaches and demonstrates the ability to evaluate competitive technologies prior to implementation. Transfer of this methodology to the system-on-a-chip domain using Cadence's Virtual Component Codesign infrastructure is also discussed with promising results. Index Terms-Hardware/software codesign, model continuity, open-standards middleware, specification and design methodology. ae 1 INTRODUCTION T HE codesign of embedded real-time signal processing systems is complex and made more difficult when pressed by time-to-market. The use of commercial-off-theshelf (COTS) multiprocessing (MP) hardware and software is usually required by the customer and can reduce the complexity of the codesign by constraining the hardware search space. Complexity can be further reduced by using emerging rapid system prototyping (RSP) frameworks created for COTS MP-based systems. These frameworks provide GUI canvases for hardware and software design as well as configuration and integration and also perform effective code generation that produces deployable code by leveraging vendor communication and computation libraries. While these RSP frameworks assist greatly in implementation, they are inadequate in providing a sound, coherent specification and design methodology (SDM) for two main reasons.
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