The need for smaller and faster electronic circuits is driving the design of printed circuit board (PCB) interconnects in the direction of finer pitch transmission lines, smaller diameter through holes and vias, and thicker boards with higher layer counts to provide increased circuit densities. Many of the major defects associated with the manufacture of semiconductors and PCBs may be attributed to poor mechanical quality of z-interconnects. Faraday Technology is coupling patented cell geometry with alternating flow schemes to address copper metallization for shrinking interconnect dimensions. Preliminary modeling work provided the initial switching frequency and flow rate targets for the experimental optimization work that is currently underway. This work is anticipated to improve copper metallization uniformity in high aspect ratio z-interconnects, resulting in improved throwing power and mechanical properties as compared to currently available plating cell geometries and agitation mechanisms.
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