As the device becomes smaller, overlay accuracy requirement is more critical. The wafer alignment is one of the important elements that impact overlay accuracy. In this paper, an evaluation of alignment performance was performed using various alignment marks placed in the scribe-line of short-loop wafers used for SilTerra 130nm process. The alignment capability and overlay performance were studied for Trench 1 aligns to Contact and Vial aligns to Trench 1, which follows layer-to-layer alignment scheme. A Design of Experiment was conducted with splits in interlayer dielectric (ILD) thickness, tungsten and copper CMP polishing time, in order to evaluate the process sensitivity of multiple alignment marks. Two different types of alignment marks were evaluated. There are Scribe-line Primary Marks (SPM) and Versatile Scribe-line Primary Mark (VSPM). To implement this experiment, exposures were performed using a scanner with various marks and recipes. Then, overlay measurement was conducted on an off-line overlay metrology tool to evaluate the effectiveness of the alignment performance. Data taken by scanner and off-line overlay metrology tool were analysed. The comparison was done between different mark types in an attempt to find out the robust alignment strategy (mark type/color/order) covering all process variation. The results show that, all alignment marks demonstrate low sensitivity to process variation where as there are no wafers were rejected due to alignment error. Besides that, the number of gratings in mark's subdivision for SPM and VSPM affect the signal strength.
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