With the recent growth in wireless industry, and changes that occur at a faster pace in radio standards, software defined radio (SDR) provides a flexible solution when compared with hardware radios. Channelisation and sample rate conversion (SRC) are two computational intensive tasks to be carried out in SDR receivers. Reconfigurable anti-aliasing filter and channeliser with minimum reconfiguration overhead is needed for the design of SDR receivers. Low complexity, coefficientless cascaded-integrator-comb filters provides flexible reconfiguration for SRC over a wide integer range, but offers gain droop in the passband of interest. Moreover, they are not suitable for achieving SRC by fractional rates. In this study, the authors propose the design of variable digital filter (VDF) for gain droop compensation and fractional SRC to meet the spectral characteristics of multiple radio communication standards, employing singular value decomposition algorithm. The proposed design of VDF is tested for its reconfigurability with four radio standards, namely, GSM900, WCDMA/CDMA 2000 and WiMAX 802.16. Simulations carried out in MATLAB showed that the proposed VDF had improved spectral response in comparison to other methods proposed in literature.

In software defined radio (SDR) receivers, sample rate conversion (SRC) and channelization are two computational intensive tasks. Coefficient-less cascaded-integrator-comb (CIC) filters achieve SRC with low computational complexity, but the design of its gain droop compensation filter involves coefficients. These coefficients vary with the change in radio standards. In this paper, an architecture for variable digital filter (VDF) for gain droop compensation employing a set of fixed coefficient sub-filters and multi-dimensional polynomials in terms of spectral parameters is realized based on distributed arithmetic (DA). As the coefficients in the sub-filters are fixed, the proposed method uses ROM-based LUTs giving rise to low computational complexity. The proposed DA–VDF filter is synthesized on an application specific integrated circuit (ASIC) employing CMOS 90[Formula: see text]nm technology using Synopsis Design Complier. The proposed architecture achieves low latency at a reduced area delay product (ADP) of 78% and an efficiency of 72% in energy per sample (EPS) when compared with the conventional MAC-based architecture.

In the conventional airborne telemetry system, the pre-modulation filter with a multipole active Bessel filter is preferred to use in Pulse Code Modulator (PCM)/FM transmission. In the existing system, it is not possible to change the cutoff frequency for different data rates dynamically as required in the launch scenario of a long-range aerospace vehicle. In general, aerospace vehicle has multiple propellant stages to travel a desired trajectory path. Each stage gets separated from the vehicle at different instances. Each stage measurement plan is defined and correspondingly the PCM format is generated with an optimum data rate. Hence, the telemetry system is required to transmit variable data rates at various instances of a long-range aerospace vehicle from launch point to end point of a vehicle. This can be addressed by designing a dynamically tuneable pre-modulation (DTPM) filter. Here, a suitable DTPM filter scheme is proposed to mitigate variable data rate transmission in the telemetry system. The scheme is analysed as per IRIG-106 standard and simulated using MATLAB. The same has been modelled using VHDL and implemented targeting 28 nm technology Xilinx Zynq FPGA device. How to cite this article: Karnati SR, Bopanna L, Jahagirdar DR. Dynamically tuneable pre-modulation filter for an airborne PCM/FM telemetry system. IET

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