This paper describes a system capable of generating schematic diagrams for gate-level digital logic circuits given only their net-list descriptions in the VHSIC (Very High Speed Integrated Circuit) Hardware Description Language (VHDL). A combination of algorithmic and heuristic methods are employed to synthesize a schematic drawing which is as aesthetically pleasing and functionally readable to human designers as possible. A methodology for generating schematics which contain feedback loops is presented.
In estimating the cardinality of tuples in a database satisfying a query, it is apparent that under the unifm distribution assumption, the more homogeneous the data distribution is, the more accurate the estimation will be. Unfortunately, the distribution of data in a database is not homogeneous, nor is independent among its attributes. in general, which make most of the present estimation models inaccurate. This paper presents a new approach for organizing a large collection of multi-dimensional data with an unknown distribution by partitioning the data such that the data is relatively homogeneously distributed in each block. A multi-dimensional tree is generated according to this partition. After the tree is generated, summary data estimation, such as selectivity estimation, can be performed via a tree search. This approach is applicable to both ordered and categorical attributes. The merits of this method are verified theoretically and by simulation.
This paper describes an approach to symbolic transistor placement from a CMOS circuit net-list as part of an automatic custom cell layout system, PLAY. It consists of two parts, extraction and refinement. The extraction process defines a set of patterns using local connection relationships. Refinement procedures assign topological attributes to each transistor through these patterns and relationships along with other heuristic knowledge. This paradigm provides a new way to embed designers' knowledge for circuit layout. Although only CMOS circuit layout placements are demonstrated, this approach can readily be extended to other technologies. Comparison between PLAY and manual design results is also reported.
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