In this article, a novel limiters power is designed and validated by ADS software. The new limiter is based on a mictrostrip circuit and uses M SFET transistors and Schottky diode as actives components. This Power Limiter have been optimized in two steeps: the first circuit is composed of one stage. Simulation of this circuit presents some limitation in termes of limitation rate. To improve this performance, a new circuit composed of two stages is simulated and optimized. The final circuit exhibits 25 dB of limitation rate while insertion loss is-1 dB with a threshold input power level of 0 dBm until a maximum input power level of 30 dBm.
In this work, new design and simulation of a microstrip power limiter based on Schottky diode is presented. The proposed circuit is a zero bias power limiter built by associating a transmission line in parallel to a four Schottky rectifier bridge circuit. The first circuit using a single stage rectifier is analyzed and simulated. To improve this single stage, a second and final limiter is designed with two stages rectifier. Simulation results for the final circuit show an ideal limiter behavior and good performance of limiting rate up to 20dB for a threshold input power varying from 5 dBm to 30 dBm. While insertion loss remains low at small signal.
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