This paper presents a novel low complexity technique for reducing the peak-to-average power ratio (PAPR) in orthogonal frequency division multiplexing systems followed by an efficient hardware co-simulation implementation of this technique by using a Xilinx system generator on field programmable gate array. In this technique, the output of inverse fast Fourier transforms (IFFT) is partitioned into M subblocks, which are subsequently interleaved. Then, a new optimization scheme is introduced in which only a single two phase sequence need to be applied. Unlike the conventional partial transmit sequence (C-PTS) which needs M-IFFT blocks and WM−1 iterations, the proposed technique requires only a single IFFT block and M iterations. These features significantly reduce processing time and less computation that leads to reduced complexity. Simulation results demonstrate that the new technique can effectively reduce the complexity up to 99.95% compared with the conventional PTS (C-PTS) technique and yields good PAPR performance. The good PAPR performance arises from the effect of both the data interleaving and the new optimization technique. Through the comparison of performance between simulation and hardware, it is distinctly illustrated that the designed hardware block diagram is as workable as the simulation, and the difference of the result is only 0.1 dB.
In this paper, we propose a novel hybrid multiplicative-additive technique to reduce the peakto-average power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) systems. This technique consists of two inverse fast Fourier transform (IFFT) blocks. The input symbols of the first IFFT are the mapped symbols, whereas the input symbols of the second IFFT are the summations of the absolute value of the real part of the outer signal constellation points and zeros symbols. First, the output of the two IFFT blocks is partitioned into four subblocks, which are subsequently used to rearrange the subblocks with padding zeros in a specific manner. Then, a new optimization scheme is introduced, in which only a single two-phase sequence and four iterations needs to be applied. Numerical analysis shows that the hybrid proposed technique achieves better bit error rate (BER) and PAPR reduction performance than partial transmit sequences (PTS) multiplicative technique and tone reservation (TR) additive PAPR technique. The other salient feature of this scheme is that no side information (SI) is needed which increases transmission efficiency.
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