As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people often treat systematic components of the variations, which are generally traceable according to process models, in the same way as random variations in process corner based methodologies. Consequently, the process corner models are unnecessarily pessimistic. In this paper, we propose a new cell characterization methodology which captures lithography induced gate length variations. A new technique of dummy poly insertion is suggested to shield inter-cell optical interferences. This technique together with standard cells characterized using our methodology will let current design flows comprehend the variations almost without any changes. Experimental results on industrial designs indicate that our methodology can averagely reduce timing variation window by 8%-25%, power variation window by 55% when compared to a worst case approach. For an industrial low power design, over 300ps reduction on the path delay variation is obtained by using cells characterized according to our methodology.
A stacked plate-capacitor design technique for filters constructed on multilayer substrates is proposed. With this technique, the parasitic effects between capacitors and grounds as well as the parasitic effects between different capacitors can be significantly reduced. The proposed layout can be used in multlayered filters design as a block and the design procedure for filters can be simplified. The proposed layout is analysed in detail. A multilayered filter is designed to demonstrate the design procedure. Both simulation results and measurement results show the effectiveness of the proposed technique.
Based on our previous work on Mobile Actuator and Sensor Network, Applied Fractional Calculus, Sensor Networks and BUMMPEE (Bottom-Up Modeling of Mass Pedestrian flows implications for the Effective Egress of individuals with disabilities), a general framework is proposed for modeling and managing Mass Pedestrian Evacuations (MPE) in this paper. A distinctive feature compared with previous work is the incorporation of Individuals with Disabilities (IwDs) in understanding modeling and control of mass pedestrians evacuations. Networked Segway Supported Responders (NSSR) have been firstly employed in the research of modeling and control/managing problem of crowd pedestrians as mobile sensors and mobile actuators. Future simulation and experimental results will be referenced for public policy professionals and planners for better evacuation policy making and route planning.
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