We have developed a multilayer structure with a smooth surface and fabrication processes for HTS single-flux-quantum (SFQ) circuits. The multilayer structure with surface roughness R a less than 2 nm, composed of a La 0.2 -Y 0.9 Ba 1.9 Cu 3 O x ground plane and base electrode layer, and SrSnO 3 insulating layers, was deposited by off-axis magnetron sputtering. We have fabricated interface-engineered junctions based on the multilayer structure using an La 0.2 -Yb 0.9 Ba 1.9 Cu 3 O x counter-electrode layer prepared by pulsed laser deposition. The fabricated junctions exhibited excellent Josephson characteristics with a 1-σ spread in I c as low as 8% for 1000 junctions. The sheet inductance values below 50 K were 0.8-1.0 pH per square. Operation of several elementary SFQ circuits including a toggle flip-flop, a confluence buffer, a set-reset flip-flop and other SFQ elements has been successfully demonstrated at 30-60 K.
We have fabricated ramp-edge Josephson junctions using a Cu-poor oxide layer as a precursor of the barrier. La 0 2 Y 0 9 Ba 1 9 Cu 3 O (La-YBCO) and La 0 2 Yb 0 9 Ba 1 9 Cu 3 O (La-YbBCO) were used for the base-electrode and the counter-electrode, respectively. A Cu-poor precursor was deposited on a pattered base-electrode at a substrate temperature ( s ) of approximately 660 C by a pulsed laser deposition (PLD) method employing deposition conditions different from those for the counter-electrode layer. The fabricated junctions on a La-YBCO ground plane showed resistively and capacitively shunted junction-type current-voltage characteristics. They exhibited the products of the critical current ( c ) and the junction resistance ( n ) higher than 3 mV and excess current ratio less than 30% at 4.2 K. The c n products were nearly 1.5 times larger than those for junctions with an interface-modified barrier in a temperature range of 4-50 K. The junctions had a barrier region with the thickness of approximately 1 nm and a Cu-poor transition region narrower than that for the latter type of junctions.
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