The BOSCH etch process, which is commonly used in microelectromechanical system fabrication, has been extensively investigated in this work for implementation in through-silicon via (TSV) technology for 3D-microsystems packaging. The present work focuses on thermo-mechanical stresses caused by thermal loading due to post-TSV processes and their impact on the electrical performance of through-silicon copper interconnects. A test vehicle with deep silicon copper-plated comb structure was designed to study and evaluate different deep silicon via etch processes and its effect on the electrical leakage characteristics under various electrical and thermal stress conditions. It has been shown that the leakage current between the comb interconnect structures increases with an increase in sidewall roughness and that it can be significantly lowered by smoothening the sidewalls. It was also shown that by tailoring a non-BOSCH etch process with the normal BOSCH process, a similar leakage current reduction can be achieved. It was also shown through thermo-mechanical simulation studies that there is a clear correlation between high leakage current behavior due to non-uniform Ta barrier deposition over the rough sidewalls and the thermo-mechanical stress induced by post-TSV processes.
Local area networks (LANs) and everyday speech inspire a model of communication by unbuffered broadcast. Computation proceeds by a sequence of messages, each transmitted by one agent and received by zero or more others. Transmission is autonomous, but reception is not. Each message is received instantaneously by all agents except the transmitter, but is read only by those who were monitoring it at the time; others discard it. As in CCS, agents learn about the environment only through the messages they read. Programming such a system is hard because we have to ensure that messages are read.Testing resembles a viva-voce examination. Observation, restriction and hidden actions differ from their CCS counterparts, as does testing equivalence. We capture this model in a Calculus of Broadcasting Systems (CBS). We use transition systems with transmit, read and discard actions. Discards are self-loops, and only auxiliary. We have some results on strong bisimulation and testing, but much work remains to make CBS tractable.
It has been shown that as the aspect ratio of through-silicon vias (TSV) increases, tapering of TSV structure greatly helps in achieving good sidewall coverage for dielectric, barrier and copper seed metal layers to eventually achieve a void-free copper via-filling by electroplating process. In the present work, a novel three-step tapered via etching process has been developed and demonstrated as a viable process for fabricating a void-free through-silicon copper interconnection structure. This paper discusses in great detail about the plasma etch mechanisms responsible for the step-by-step evolution of tapered silicon via the profile angle in the desirable range of 83-87 • . It is further shown that the above multi-step etch process enables the formation of void-free copper vias for via depths close to 300 μm.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.