We report on catalyst-driven molecular beam epitaxy of ZnO nanorods. The process is site specific, as single crystal ZnO nanorod growth is realized via nucleation on Ag films or islands that are deposited on a SiO2-terminated Si substrate surface. Growth occurs at substrate temperatures on the order of 300–500 °C. The nanorods are uniform cylinders, exhibiting diameters of 15–40 nm and lengths in excess of 1 μm. With this approach, nanorod placement can be predefined via location of metal catalyst islands or particles. This, coupled with the relatively low growth temperatures needed, suggests that ZnO nanorods could be integrated on device platforms for numerous applications, including chemical sensors and nanoelectronics.

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To study the feasibility of integrating the antennas in integrated circuits. short linear, meander, and zigzag dipole antennas were implemented on silicon wafers using processing steps compatible wth the silicon IC technology. The axial length of the antennas is 2 mm and the width of the metal lines is 10 pn. From phase delay measurements, it is shown that EM waves predominantly travel through the silicon substrate. Transmission gain (received powerlavailable transmitted power) dependence on distance is greater than expected. Meander dipole antennas have 3-5 dB higher gains than the other antennas. Input impedances of these antennas can be modeled well using lumped elements. This paper demonstrated that wireless communication within silicon ICs is possible.

Improved RF capability and projected increase in die size [1] for CMOS circuits lead to the concept of wireless communications within and between chips. A potential application is wireless clock distribution, proposed as an alternative interconnect system capable of distributing high frequency clock signals at the speed of light using microwaves [2]. The wireless clock distribution system consists of a clock transmitter, located on or off chip, broadcasting a microwave global clock signal at frequencies greater than 15GHz, and a grid of integrated clock receivers. Figure 19.6.1 shows a block diagram of a clock receiver. The global clock signal is received using an integrated dipole antenna. The signal is then amplified using a low-noise amplifier (LNA), frequency divided down to the local clock frequency, buffered, and distributed to provide local clock signals. This IC operating at 7.4GHz, which integrates antennas and necessary receiver circuits in 0.25µm CMOS with five metal layers on p-substrates, is a first step towards realizing such a system.The antenna is a 2mm long, 10µm wide linear dipole [3]. In oxide (ε r =3.9), 2mm corresponds to ~λ/10 at 7.4GHz. The antennas are fabricated in metal 5, separated from the substrate by ~7µm of oxide. Figure 19.6.2 shows a schematic of the LNA and a sourcefollower buffer. A fully-differential topology rejects common-mode noise (such as substrate noise) eliminates the balanced-to-unbalanced conversion between the antenna and LNA input, and provides clock signals with 180° phase difference to the frequency divider. Each half-circuit of the LNA consists of a cascode amplifier with inductive source degeneration (L s ), a series inductor at the input (L g ), and an inductive load (L d ) [4]. The input of each halfcircuit is matched to 50Ω.Following the LNA are source-follower buffers. These buffers shift the DC level from the output of the first stage to the input of the divider, and help to isolate the capacitive load of the divider input from the tuned load of the LNA. A source-follower driving a capacitive load can have negative input conductance, proportional to the transconductance of M 7,8 . This negative conductance is used to enhance the gain of the LNA by increasing the Q of the resonant circuit at the drain nodes of M 3,4 . However, too much negative conductance can result in unstable operation. By adjusting the current through the source-follower, the gain can be improved while maintaining stability. Figure 19.6.3a shows the measured S-parameters of an LNA without the source-follower buffers. The outputs of this LNA are matched using on-chip capacitive transformers [4]. Driving 50Ω, the LNA provides ~10dB gain with input and output reflection coefficients <-15dB, consuming 21mW from a 2.5V supply.

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