Heteroepitaxial CuInSe2 (CIS) layers have been directly grown on Si substrates by molecular beam epitaxy. Epitaxial growth is achieved by using a proper thermal treatment of the substrate prior to the growth and also during the initial stage of CIS growth. (100)-oriented and (112)-oriented CIS layers with chalcopyrite crystal structure, and free from impurity phases have been obtained on Si(100) and Si(111), respectively. Different methods have been used to study the growth kinetics and structural quality of the epitaxial layers. Twinning in (112)-oriented CIS layers depends on the deposition recipe. A Rutherford backscattered ion channeling minimum yield of about 13%, and an x-ray rocking-curve width of about 900 arcsec have been measured for a 0.4 μm thick heteroepitaxial CIS(112) layer on Si(111) substrate.
MBE growth and infrared device fabrication with epitaxial lV-VI layers on Si-substrates is reviewed and some new results are included. Epitaxy is achieved using a stacked BaF2/CaF2 or CaF2 buffer layer. While photolithographic delineation techniques are somewhat difficult with BaF2 (whiôh is soluble in water), reliable wet-etching techniques are easy with the CaF2 buffer. Photovoltaic IV-VI sensors on Si(1 1 1 ) substrates are fabricated with cut-off wavelengths covering the whole atmospheric 3-5 and 8-1 4 im window. They offer the possibility for low cost infrared focal plane arrays with sensitivities similar to MCT, but with much less demanding material processing steps. This is because the structural quality of even heavily lattice mismatched lV-Vl layers suffices to fabricate devices with good sensitivities, and because the bandgap in Pb1SnSe for the 8-12 jim range depends much less on composition x than for the corresponding Hg1CdTe. A 13 mm long linear array with 10.5 jim cutoff wavelength has inhomogeneities in cut-off below 0.1 .tm. Some arrays were grown on prefabricated active Sisubstrates containing the whole read-out circuits. Process temperatures were below 450°C because of the Almetallization. First thermal images using these chips are demonstrated.The induced mechanical strain due to the different thermal expansions relaxes down to cryogenic temperatures even after many temperature cycles. This is due to dislocation glide in the main {100}-glide planes even at low temperatures.
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