A memory device p-Si/SiO2/(TiO2)0.8(Al2O3)0.1(TAO-81)/Al2O3/Pt was fabricated, in which a composite of two high-k dielectrics with a thickness of 1 nm was employed as the charge-trapping layer to enhance the charge-trapping efficiency of the memory device. At an applied gate voltage of ±9 V, TAO-81 memory device shows a memory window of 8.83 V in its C-V curve. It also shows a fast response to a short voltage pulse of 10−5 s. The charge-trapping capability, the endurance, and retention characteristics of TAO-81 memory device can be improved by introducing double TAO-81 charge-trapping layers intercalated by an Al2O3 layer. The charge-trapping mechanism in the memory device is mainly ascribed to the generation of the electron-occupied defect level in the band gap of Al2O3 induced by the inter-diffusion between TiO2 and Al2O3.
Effective separation of charge carriers and substantial prolongation of charge carrier lifetime are two vital issues for a photoanode to achieve highly efficient photoelectrochemical (PEC) hydrogen generation.
The charge-trapping memory (CTM) structures Pt/Al2O3/TaAlO/Al2O3/p-Si and Pt/Al2O3/ZrAlO/Al2O3/p-Si were fabricated by using rf-sputtering and atomic layer deposition techniques, in which the potentials at the bottom of the conduction band (PBCB) of high-k composites TaAlO and ZrAlO were specially designed. With a lower PBCB difference between TaAlO and p-Si than that between ZrAlO and p-Si, TaAlO CTM device shows a better charge-trapping performance. A density of trapped charges 2.88 × 1013/cm2 at an applied voltage of ±7 V was obtained for TaAlO CTM device, and it could keep about 60% of initially trapped charges after 10 years. It was suggested that the PBCB difference between high-k composite and p-Si dominates their charge-trapping behaviors.
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