This paper describes a low-voltage design for a pipelined ADC that can operate in a 2.0-V pp full-swing input range at a 1.0-V supply. To enlarge the input range of an ADC and maintain the output range of its op-amps, we propose a new front-end 2b-MDAC with S/H that can reduce the output ranges of all MDACs by 50% compared to the ADC's input. We designed a 10-b pipelined ADC with the proposed front-end MDAC using a 90-nm CMOS process. The ADC achieved 2.0-V pp rail-to-rail operation at only a 1-V supply and a 57.5-dB SNDR with only 3.4 mW at 30 MS/s despite using conventional folded-cascode op-amps.
We studied the postannealing conditions needed to make the 110 K phase in Bi-Sr-Ca-Cu-O superconducting thin film deposited on (001) single-crystal MgO substrates by rf magnetron sputtering. We used X-ray diffraction to estimate the amount of 110 K phase in the film. We found that the film included a large 110 K phase at about 840°C in 7–8% oxygen/helium flow and that high-speed cooling can suppress the 80 K phase formation. By comparing films made with different cooling rates, we conclude that the tail of the temperature dependence curve of the electrical resistance does not depend on the other superconducting phases whose c-axes are perpendicular to the sbstrate surface.
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