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Channeling-effect measurements have been used to investigate the lattice location of boron atoms implanted into silicon at an energy of 56 keV and with doses in the interval 1014–1015 ions/cm2. Measurements have been made as a function of implantation temperature and subsequent anneal treatment. The effect of post-bombardment with different doses of 680-keV protons has also been investigated.

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The orientation dependence of the backscattering yield of 1.8-MeV carbon ions has been used to determine the lattice location of group III and V elements implanted into Si and Ge at 30 keV and ∼350°C. It is shown that the lattice location of p-type dopants is affected by the presence of n-type dopants in the substrate. For example, when T1 is implanted alone into Si a large interstitial component is observed. For a ``mixed'' T1 and As implantation, however, the substitutional T1 component is enhanced at the expense of the interstitial component.

Metal gate MOS-transistors with channel lengths down to approximately 0.5 pm and with gate oxide thicknesses of 19 nm and 34 nm have been fabricated and evaluated. For devices shorter than l p m we have found significant short channel effects on threshold voltage, transconductance and subthreshold current. The experimental results have been compared with computer model calculations. A good agreement between measured and calculated values was found regarding the geometry dependence.the best possible dimensional control by avoiding any etching step. The gate oxide was grown at 875°C in a mixture of HCl and HzO and subsequently annealed at looo~c for 3o min in N2 atmosphere* Two different gate Oxide thicknesses were used, 19 * 2 nm and 34 f 2 nm as determined by Surface Profdometer measurements. The channel region was ion implanted with 1l&ions to a dose of 5.5 1011 cm-Z at 10 keV for the 19nm oxide and 3 . 0 ~1 0 " c m -~ at 16keV for the 34nm oxide. The subsequent anneal was performed at 900°C for 30min in N2 atmosphere. The implantation conditions were