Pulsed-laser deposited (Pb,Sr)TiO(3) (PSrT) films on Pt/SiO(2)/Si substrate at various ambient oxygen pressures (P(O(2))) are investigated in this work. Films deposited at P(O(2)) below 100 mTorr exhibit the (100) preferred orientation and a tetragonal structure with larger tetragonality. In addition, films deposited at 80 mTorr exhibit the most apparent ferroelectric properties in contrast to those deposited at 200 mTorr. Moreover, films deposited at higher P(O(2)) also exhibit longer lifetimes and higher breakdown fields due to their smaller leakage current density, in terms of the reduction of defects, compensation of oxygen vacancies (OVs), an improved interface and small cluster sizes. An energy band model reveals that fatigue properties of PSrT films are dominated by interfacial states at low P(O(2)) and by deep trapping states at high P(O(2)), which could be ascribed to OVs located at the interfaces and inside films, respectively.
Pb,Sr)TiO 3 films deposited on Pt/SiO 2 /Si substrates by pulsed-laser deposition (PLD) at 400 • C with oxygen pressures ranging from 50 to 200 mTorr have been investigated. The paraelectricity-to-ferroelectricity transition of films depends on the oxygen pressure during deposition. Films deposited at 200 mTorr exhibit paraelectric-like nature, whereas films deposited at lower pressures present the ferroelectric characteristic. The (Pb,Sr)TiO 3 film is found to exhibit a negative temperature coefficient of resistance (NTCR) at the measurement temperature ranging from 30 to 390 • C. This work demonstrates that the ferroelectricity/paraelectricity and the temperature coefficient of resistance of (Pb,Sr)TiO 3 films could be controlled by oxygen pressures during PLD.
In this study, pulsed-laser deposited (Pb,Sr)TiO 3 (PSrT) films on p-type Si were studied at low substrate temperatures ranging from 300 to 450 • C for metal/ferroelectric/semiconductor applications. The substrate temperature strongly enhances film crystallinity without significant inter-diffusion at the PSrT/Si interface and affects the electrical properties. As the substrate temperature increases, the films have smaller leakage currents, fewer trap states at the electrode interfaces, clockwise capacitance versus applied field hysteresis loops and larger memory windows correlated with superior crystallinity. Conversely, 300 • C-deposited films exhibit a small and counterclockwise loop with a positive shift of the flatband voltage, attributed to more negative trap charges within the films. However, the high substrate temperature (450 • C) may produce serious Pb-O volatilization, incurring more defects and leakage degradation. The analyses of fixed charge density and flatband voltage shift reveal the trap status and agree well with the leakage characteristic. An electron band model of the Pt/PSrT/Si electronic structure is proposed to explain the electrical behaviour. The excellent fatigue endurance with a small variation of memory windows (<11%) after 10 10 switching is also demonstrated.
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