Reverse-time chaos can be used to realise hardware chaotic systems that can operate at speeds equivalent to existing state-of-the-art while requiring significantly less complex circuitry. Unlike traditional chaotic systems, which require significant analogue hardware that is difficult to realise at high speed, the reverse-time system can be realised with a field programmable gate array calculating a digital iterated map. The resulting output forgoes the need for digital-to-analogue conversion by directly driving a series RLC filter. Since the dynamics of this system are determined by an iterated map, precise control of this system is possible by adjusting the map's initial condition. Hardware results for the controllable reverse-time system demonstrate chaotic behaviour at an operating frequency of 1.8 MHz and show promise for extension to higher frequencies.Introduction: Chaotic electronic systems have been previously investigated for their potential utility in many applications including communication [1] and radar [2]. Previous work has shown that such systems can be constructed and tuned, such that they possess dynamics advantageous for their specific application [3]. Control schemes have also been devised that can maintain these systems on desired trajectories while in operation [4]. By combining these characteristics with matched filter decoding [5], many of the necessary components for a modern high-performance communication system or radar may be realised with chaotic dynamics.Actually realising physical systems that exhibit the chaotic dynamics necessary for these applications has long proven to be a difficult task. Although surprisingly simple systems constructed from both familiar [6] and exotic [7] components have been shown to behave chaotically, such systems do not readily lend themselves to control. Simulations have shown that hardware can be developed for a potentially controllable chaotic system with an exact solution [8], but this hardware relies on many analogue components that are not expected to scale well with high-speed operation.Reverse-time chaos provides a potential solution for realising chaos in hardware with both solvable and controllable properties without sacrificing the ability to scale in frequency. First proposed by Corron et al. in [9], reverse-time chaos describes behaviour that differs from traditional chaos by using the current state of the system to represent all of its past states instead of all of its future states. Despite this difference, reversetime chaos retains a positive Lyapunov exponent and a corresponding sensitivity to initial conditions that defines traditional chaotic systems.
The use of reverse time chaos allows the realization of hardware chaotic systems that can operate at speeds equivalent to existing state of the art while requiring significantly less complex circuitry. Matched filter decoding is possible for the reverse time system since it exhibits a closed form solution formed partially by a linear basis pulse. Coefficients have been calculated and are used to realize the matched filter digitally as a finite impulse response filter. Numerical simulations confirm that this correctly implements a matched filter that can be used for detection of the chaotic signal. In addition, the direct form of the filter has been implemented in hardware description language and demonstrates performance in agreement with numerical results.
This paper describes design choices and tradeoffs made when designing total-dose hardness into an advanced CMOS integrated circuit. Closed geometry transistors are described and compared, emphasizing their radiation tolerant performance. Speed and area tradeoffs incurred in circuit design when using such closed geometry transistors are illustrated in the design of an advanced IEEE 1394 cable physical layer mixed-signal interface chip.
Characterisation results of the complex permittivity of select dielectric cooling fluids at room temperature and over a broad frequency range found using a low-loss printed circuit board microstrip ring resonator technique are presented. ANSYS HFSS, a finite-element full-wave electromagnetic simulation environment, was used to fit the simulated insertion loss to the calibrated measurements of the microstrip ring resonator in air and submerged in different dielectric fluids. The resulting frequency-dependent relative permittivity and loss tangent are provided up to 50 GHz for three dielectric cooling fluids: 3M™ Novec™ 649, 3M™ Novec™ HFE-7100 and 3M™ Fluorinert™ FC-72.
A matched filter developed for use in chaos-based communications systems is presented. A matched filter is the optimum filter for maximizing the signal-to-noise ratio of a received signal in the presence of additive Gaussian white noise (AGWN). Chaos-based communications systems encode information into a chaotic waveform using arbitrary small perturbations to control the trajectory of the chaotic oscillator. Chaotic waveforms are deterministic, are sensitive to initial conditions, have aperiodic long-term behavior, have a spread frequency spectrum, and are theoretically immune to interference. There has been great interest in using chaotic waveforms in communication applications. One reason for this interest is that the spread spectrum of a chaotic waveform gives the appearance of noise when observed over a prolonged period of time. This masks the waveform from anyone without prior knowledge of its presence. Another reason is that to retrieve the information encoded in the chaotic waveform, complete knowledge of the waveform must be known. This makes it difficult for anyone other than the intended recipient to decrypt the information. Normally, implementing a matched filter for a chaotic waveform is difficult because such waveforms do not have a fixed basis function and have irregular timing. However, a unique chaotic oscillator has been developed that can be represented as an exact analytic solution. The waveform's solution can be written as a convolution of a symbol sequence and a fixed basis function. This fixed basis function makes it possible to derive a delay differential equation describing the matched filter. In order to test the matched filter, an amplitude modulated communications system was developed. In the system, the oscillator's output is first amplitude modulated with 2.3GHz carrier before being transmitted. The receiver then demodulates the signal and applies it to the matched filter. Any encoded information can then be extracted from the output of the matched filter. The oscillator and matched filter were designed to operate at 1.8MHz. In both simulation and testing, the matched filter was able to detect the chaotic waveform in the presence of AWGN.
Use of unpackaged die in advanced integrated systems (i.e., 3-D integrated systems) calls for dense interconnection schemes with controlled impedance for high-speed signal routing and minimal impedance for efficient power distribution. We have evaluated a new material set for use in a thin-film-based redistribution layer (RDL) that consists of Asahi Glass AL-X spin-on low-k dielectric polymer and electroplated copper metallization. This technology allows fan-out and interconnection of high-speed signals and power to/from die pads on pitches sufficiently less than 100 μm directly to companion die over short distances or for transition to underlying board metallization for longer transmission distances that may require lower signal loss. This technology is demonstrated using Si wafers onto which the thin-film RDL is fabricated. We have developed and described the fabrication procedures used to construct multiple interconnected layers of AL-X / Cu, which are compatible with standard wafer level packaging (WLP) processes. We have also evaluated the performance of this technology for high-speed digital signal transmission by characterizing frequency parameters (i.e., S parameters) of single-ended and differential strip-line transmission line structures. We have optimized transmission line geometries for transmission of signals at rates greater than 25 Gbps. In addition to high-speed signal redistribution capabilities, we have characterized power redistribution capabilities of this technology. Results of the signal and power integrity measurements and simulations performed in this work are presented.
The many advantages of low temperature co-fired ceramic (LTCC) materials are increasing their use in multi-layer systems containing multiple high-frequency / high-speed digital interconnects. Although construction of such interconnects is possible with current fabrication techniques, the loss exhibited by transmission lines at high frequencies limits their application by increasing system power consumption or requiring complex transceivers. Use of non-standard metal printing processes provides one possibility for realizing lower insertion loss desired for these interconnects. We have fabricated and evaluated representative single-ended and differential stripline transmission line structures using single, double, and mirror printing techniques for Ag metalization in DuPont 9K7 LTCC, to explore their suitability for high-frequency/high-speed applications. Discussion of analysis performed on cross-sections of these structures to determine post-firing geometry, as well as the level of fabrication control afforded over these parameters will be presented. To predict their performance for high-speed interconnects, 3D electromagnetic (3DEM) simulation models for characterizing the frequency performance of single-ended and differential structures have been also been developed. These 3DEM models have also been used in time domain simulations to verify digital signal capability by demonstrating structure performance at data rates exceeding 25 Gbps. Measurements of fabricated structures corresponding to the 3DEM models have also been performed in both the time and frequency domain and will be compared to the simulation results to confirm 3DEM model accuracy. The culmination of results from simulation and measurement will be used to present the differences, advantages, and disadvantages of each fabrication technique.
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