Micro-displays based on micro-LEDs are becoming more and more attractive in AR/MR (Augmented/Mixed Reality) applications. A display size of 0.5 to 0.7-inch is preferred, with 5,000 PPI (Pixel Per Inch) or higher. Due to this pixel density and size, a CMOS (Complementary Metal-Oxide-Silicon) backplane is an ideal solution to drive these pixelized micro-LEDs. As the required pixel size gets smaller, the design of the appropriate pixel circuit becomes more challenging. The simplest 2T1C (2 transistors & 1 capacitor) pixel circuit has potential problems, due to the leakage current of the switch transistor and the voltage drop on the matrix array layout. In this paper, a pixel circuit is proposed as a solution to overcome these two issues. Our simulation results show that the variation of the driving current to the LED is improved by 95 %, and the IR drop error rate is around 2.2 % compared to the 2T1C circuit. The test results also show that the error rate of I PIXEL for the whole region of display is under 2.5 %. This work is verified using a test chip implementation with 180 nm CMOS process technology. INDEX TERMS Micro-LED display, microdisplay, high-resolution, DRAM type, voltage driving, low leakage switch, IR drop compensation, CMOS backplane, and high-PPI.
In this study, a new method is developed to control the Clto-I ratio in MAPbI 3−x Cl x perovskite solar cells (PSCs) more easily and precisely using single-source vapor deposition of MAPbCl 3 thin films and a subsequent anion exchange by repeated spin-coatings of methylammonium iodide (MAI) solution. This method can overcome the problems of previous vapor-deposition techniques for PSCs such as the occurrence of morphological defects in the films and difficulty in controlling the stoichiometry of the elements. The repetitive MAI treatments gradually fill the interstitial voids in the perovskite film and increase the average grain size up to 1.2 μm, which improves the charge-transfer property of the cells. The atomic Cl content, i.e., the x value, of the MAPbI 3−x Cl x film can also be simply controlled by changing the number of MAI treatments. The energy levels and resistive elements of the cells are strongly dependent on the x value of the MAPbI 3−x Cl x film. A maximum power conversion efficiency of 19.1% is achieved at x = 0.005.
The Micro‐LED display is getting more attention in AR/MR (Augmented/Mixed Reality) applications. The display size of 0.5 to 0.7‐inch is preferred with 5,000 or higher PPI (Pixel Per Inch). Due to the pixel density and size, a CMOS (Complementary Metal‐Oxide‐Silicon) backplane is a preferred solution for driving the pixelized micro‐LEDs. This paper proposes a multi‐bit MIP‐based pixel circuit with PWM driving for a CMOS backplane in order to minimize power dissipation. it also provides an estimation of the minimum achievable pixel size based on the CMOS process node.
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