A non-binary split-type MOM weighted capacitor array based on fractal geometry for SAR (Successive Approximation Register) ADC is proposed. By taking advantage of the geometric characteristics of the Hilbert curve, the capacitor array avoids the use of complex commoncentroid structure and complex wiring. The test results of the SAR ADC using this capacitor array show that, the measured DNL and INL were −0.26/0.38 LSBs and −0.37/0.38 LSBs, respectively. The ENOB is 8.66 bits. The SAR ADC was implemented using a 180-nm CMOS process with a supply voltage of 1.8 V. Its active area and power consumption are 330 µm × 1190 µm and 1.89 mW, respectively.
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