International audienceWe present SPLEnD, the first compositional design verification engine for evolving software product lines(SPLs). The unique aspect of SPL development is the reuse of common features and management of variability among the family of products. The proposed design verification engine assumes that each SPL is composed of multiple features with each feature exhibiting variability. One novel aspect of SPLEnD is that it enables verification of SPLs, in which the variability information is captured differently at different levels of abstractions in the design and requirement stages. Another novel aspect of SPLEnD is that it enables compositional verification of designs against requirements. This involves first verifying the individual features separately, which provides a mapping between the variabilities at the requirement and design levels. The obtained mapping relations are then combined in the second step to check the conformance of the entire SPL. Feature level verification essentially involves standard model checking, while for the second step, a Quantified Boolean Formula (QBF) is synthesized and solved. The QBF avoids the explicit enumeration of all possible products thereby reducing the verification effort greatly. SPLEnD uses SPIN for the first step while the state of the art QBF solver CirQit is used for the second step. Thanks to the compositionality, SPLEnD easily handles the evolution of SPL by addition of new features and modification of existing features. Experimental results with SPLEnD look very promising: SPLs with several thousands of features were verified efficiently. A video of SPLEnD can be seen at http://www.cse.iitb.ac.in/$\sim$krishnas/splend.swf or http://www.cse.iitb.ac.in/$\sim$krishnas/splend.avi
Latency-insensitive design (LID) theory was invented to deal with SoC timing closure issues, by allowing arbitrary fixed integer latencies on long global wires. Latencies are coped with using a resynchronization protocol that performs dynamic scheduling of data transportation. Functional behavior is preserved. This dynamic scheduling is implemented using specific synchronous hardware elements: relay-stations (RS)andshell-wrappers (SW).OurfirstgoalistoprovideaformalmodelingofRS and SW,thatcanbe then formally verified. As turns out, resulting behavior is k-periodic, thus amenable to static scheduling. Our second goal is to provide formal hardware modeling here also. It initially performs throughput equalization, adding integer latencies wherever possible; residual cases require introduction of fractional registers (FRs) at specific locations. Benchmark results are presented, run on our Kpassa tool implementation.
Latency-insensitive design (LID) theory was invented to deal with SoC timing closure issues, by allowing arbitrary fixed integer latencies on long global wires. Latencies are coped with using a resynchronization protocol that performs dynamic scheduling of data transportation. Functional behavior is preserved. This dynamic scheduling is implemented using specific synchronous hardware elements: relay-stations (RS)andshell-wrappers (SW).OurfirstgoalistoprovideaformalmodelingofRS and SW,thatcanbe then formally verified. As turns out, resulting behavior is k-periodic, thus amenable to static scheduling. Our second goal is to provide formal hardware modeling here also. It initially performs throughput equalization, adding integer latencies wherever possible; residual cases require introduction of fractional registers (FRs) at specific locations. Benchmark results are presented, run on our Kpassa tool implementation.
Abstract-The complex software development projects of today may require developers to use multiple requirements engineering approaches. Different teams may have to use different requirements modeling formalisms to express requirements related to their assigned parts of a given project. This situation poses difficulties in achieving interoperability and integration of requirements models for the purpose of reasoning on the overall system requirements. It is challenging to compose distributed models expressed in different notations and to reason on the composed models. In this paper we present a metamodeling approach which allows reasoning about requirements and their relations on the whole/composed models expressed in different requirements modeling approaches. In a previous work we expressed the structure of requirements documents as a requirements metamodel in which the most important elements are requirements relations and their types. The semantics of these elements is given in First Order Logic (FOL) and allows two activities: inferring new relations from the initial set of relations and checking consistency of relations. In this work we use the requirements metamodel as a core metamodel to be specialized for different requirements modeling approaches and notations such as Product-line and SysML. Mainly, the requirements relations in the metamodel are specialized to support relations in different requirements modeling approaches. The specialization allows using the same semantics and reasoning mechanism of the core metamodel for multiple requirements modeling approaches. To illustrate the approach we use an example from automotive domain expressed with two modeling approaches: product-line requirements models and SysML for system requirements.
International audienceIn a Software Product Line (SPL) comprising specifications (feature sets), implementations (component sets) and traceability between them, the definition of product is quite subtle. Intuitively, a strong relation of implementability should be established between implementations and specifications due to traceability. Various notions of traceability has been proposed in the literature : [13], [17], [8], [9]; but we found in our experience that they do not capture all situations that arise in practice. One example is the case where, an implementation, due to packaging reasons, contains additional components not required for a particular product specification. We have defined a general notion of traceability in order to cover such situations. Moreover, state-of-the-art satisfiability based notions lead to products where the implementability relation does not exist. Therefore, in this paper, we propose a simple, set-theoretic formalism to express the notions of traceability and implementability in a formal manner. The subsequent definition of SPL products is used to introduce a set of analysis problems that are either refinements of known problems, or are completely novel. Last but not the least, we propose encoding the analysis problems as Quantified Boolean Formula (QBF) constraints and use Quantified SAT (QSAT) solvers to solve these problems efficiently. To the best of our knowledge, the QBF encoding is novel; we prove the correctness of our encoding and demonstrate its practical feasibility through our prototype implementation Software Product Line Engine (SPLE)
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