Very Large Scale Integration (VLSI) based
neuromorphic circuits also known as Silicon Neurons (SiNs) emulate the
electrophysiological behavior of biological neurons. With the advancement in
technology, neuromorphic systems also lead to various reliability issues and
hence making their study important. Bias Temperature Instability (BTI) and Hot
Carrier Injection (HCI) are the two major reliability issues present in VLSI
circuits. In this work, we have investigated the combined effect of BTI and HCI
on the two types of integrate-and-fire based SiNs namely (a) Axon-Hillock and
(b) Simplified Leaky integrate-and-fire circuits using their key performance
parameters. Novel reliability-aware AH and SLIF circuits are proposed to
mitigate the reliability issues. Proposed reliability-aware designs show
negligible deviation in performance parameters after aging. The time-zero
process variability analysis is also carried out for proposed reliability-aware
SiNs. The power consumption of existing and proposed reliability-aware neuron circuits
is analyzed and compared.<br>
Very large scale integration (VLSI)-based neuromorphic systems have been evolving quickly in recent years. These systems have been used in complex cognitive tasks such as image classification and pattern recognition. A neuromorphic encoder is an essential component in a neuromorphic system, which converts sensory data into spike trains. The advancement in CMOS technology nodes leads to various reliability issues. Bias temperature instability (BTI) and hot carrier injection (HCI) are major reliability issues in analog/ mixed VLSI circuits. This paper implements a temporal neuromorphic encoder, and a corresponding mathematical model is derived for image processing applications. The relationship between an input image pixel value and output of the encoder, that is, interspike interval (ISI), is found to be exponential. The impact of BTI and HCI on the temporal neuromorphic encoder is analyzed. The degradation analysis revealed a loss of encoding functionality for which three mitigation techniques are discussed. Finally, a reliability-aware neuromorphic encoder is proposed to minimize the effect of degradation over its lifetime. The power consumption of conventional and proposed reliabilityaware neuromorphic encoders is also presented.
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