Abstract-The EU-funded CoCoRo project studies heterogeneous swarms of AUVs used for the purposes of underwater monitoring and search. The CoCoRo underwater swarm system will combine bio-inspired motion principles with biologically-derived collective cognition mechanisms to provide a novel robotic system that is scalable, reliable and flexible with respect its behavioural potential. We will investigate and develop swarm-level emergent self-awareness, taking biological inspiration from fish, honeybees, the immune system and neurons. Low-level, local information processing will give rise to collective-level memory and cognition. CoCoRo will develop a novel bio-inspired operating system whose default behaviour will be to provide AUV shoaling functionality and the maintenance of swarm coherence. Collective discrimination of environmental properties will be processed on an individualor on a collective-level given the cognitive capabilities of the AUVs. We will investigate collective self-recognition through experiments inspired by ethology and psychology, allowing for the quantification of collective cognition.
It is now known that astrocytes modulate the activity at the tripartite synapses where indirect signaling via the retrograde messengers, endocannabinoids, leads to a localized self-repairing capability. In this paper, a self-repairing spiking astrocyte neural network (SANN) is proposed to demonstrate a distributed self-repairing capability at the network level. The SANN uses a novel learning rule that combines the spike-timing-dependent plasticity (STDP) and Bienenstock, Cooper, and Munro (BCM) learning rules (hereafter referred to as the BSTDP rule). In this learning rule, the synaptic weight potentiation is not only driven by the temporal difference between the presynaptic and postsynaptic neuron firing times but also by the postsynaptic neuron activity. We will show in this paper that the BSTDP modulates the height of the plasticity window to establish an input-output mapping (in the learning phase) and also maintains this mapping (via self-repair) if synaptic pathways become dysfunctional. It is the functional dependence of postsynaptic neuron firing activity on the height of the plasticity window that underpins how the proposed SANN self-repairs on the fly. The SANN also uses the coupling between the tripartite synapses and ɣ-GABAergic interneurons. This interaction gives rise to a presynaptic neuron frequency filtering capability that serves to route information, represented as spike trains, to different neurons in the subsequent layers of the SANN. The proposed SANN follows a feedforward architecture with multiple interneuron pathways and astrocytes modulate synaptic activity at the hidden and output neuronal layers. The self-repairing capability will be demonstrated in a robotic obstacle avoidance application, and the simulation results will show that the SANN can maintain learned maneuvers at synaptic fault densities of up to 80% regardless of the fault locations.
Abstract-This paper presents the Pi-puck extension board -an interface between the e-puck robot platform and a Raspberry Pi single-board computer that enhances the processing power, memory capacity, and networking capabilities of the robot at a low cost. It allows high-level control algorithms, wireless communication, and computationally expensive operations such as real-time image processing to be handled by a Raspberry Pi, while the e-puck's microcontroller deals with low-level motor control and sensor interfacing.Although two similar extension boards for the e-puck robot platform already exist, they are now out-dated and expensive in comparison. Our open-source hardware design and supporting software infrastructure offer an inexpensive upgrade to the e-puck robot, transforming it into the Pi-puck -a modern and flexible new platform for mobile robotics research.
The project Meeting the Design Challenges of nano-CMOS Electronics (http://www. nanocmos.ac.uk) was funded by the Engineering and Physical Sciences Research Council to tackle the challenges facing the electronics industry caused by the decreasing scale of transistor devices, and the inherent variability that this exposes in devices and in the circuits and systems in which they are used. The project has developed a grid-based solution that supports the electronics design process, incorporating usage of large-scale high-performance computing (HPC) resources, data and metadata management and support for fine-grained security to protect commercially sensitive datasets. In this paper, we illustrate how the nano-CMOS (complementary metal oxide semiconductor) grid has been applied to optimize transistor dimensions within a standard cell library. The goal is to extract high-speed and low-power circuits which are more tolerant of the random fluctuations that will be prevalent in future technology nodes. Using statistically enhanced circuit simulation models based on three-dimensional atomistic device simulations, a genetic algorithm is presented that optimizes the device widths within a circuit using a multi-objective fitness function exploiting the nano-CMOS grid. The results show that the impact of threshold voltage variation can be reduced by optimizing transistor widths, and indicate that a similar method could be extended to the optimization of larger circuits.
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