A GaAs low-noise amplifier (LNA) is designed with first-time success using a technique for HEMT modelling which divides the device into intrinsic gate fingers embedded in an analysable metal structure. The gate finger is characterised by de-embedding metallisation from a standard test structure. The device is then re-built, with any geometry or layout that the foundry allows, and modelled by electromagnetic (EM) analysis. This allows techniques such as asymmetric inductive source feedback in an LNA to be modelled without prior fabrication of custom test structures. The 7-13 GHz, self-biased LNA has stateof-the-art noise figure (NF) of 1.25 dB at mid-band, gain of 20.5 ± 0.1 dB with 10 dB input and output matches, 10 dBm P1dB, 14 dBm Psat and 22 dBm OIP3. Excellent agreement is achieved with simulation. In a 3x3 QFN package the measured NF is 1.36 dB and the gain is 20 dB. The first-time design success achieved here validates the modelling and parameter extraction technique.
Operating channel temperature has an important influence on the electrical performance and reliability of GaAs FET amplifiers but this parameter is difficult to determine experimentally or analytically. Simplified closed-form and numerical models are commonly used although both are subject to errors in the case of sub-micron heat sources surrounded by epitaxial layers. Some assumptions about the heat source size and location are explored using finite-difference simulation. A simple measurement technique making use of the temperature coefficient of gate metal resistance is described, and an improved procedure for spatial averaging correction of infrared measurements of sub-micron heat sources is proposed.
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