realization of a universal quantum computer [2]. In this project, we undertake the task of implementing an extensible wiring method for the operation of a quantum processor based on solid-state devices, e.g., superconducting qubits [3][4][5]. Possible experimental solutions based on wafer bonding techniques [6-9] or coaxial through-silicon vias [10] as well as theoretical proposals [1,11] have recently addressed the wiring issue, highlighting it as a priority for quantum computing.Building a universal quantum computer [12-17] will make it possible to execute quantum algorithms [18], which would have profound implications on scientific research and society. For a quantum computer to be competitive with the most advanced classical computer, it is widely believed that the qubit operations will require error rates on the order of 10 −15 or less. Achieving such error rates is only possible by means of quantum error correction (QEC) algorithms [13,15,19], which allow for arXiv:1606.00063v1 [quant-ph]

Scalable architectures characterized by quantum bits (qubits) with low error rates are essential to the development of a practical quantum computer. In the superconducting quantum computing implementation, understanding and minimizing materials losses is crucial to the improvement of qubit performance. A new material that has recently received particular attention is indium, a low-temperature superconductor that can be used to bond pairs of chips containing standard aluminum-based qubit circuitry. In this work, we characterize microwave loss in indium and aluminum/indium thin films on silicon substrates by measuring superconducting coplanar waveguide resonators and estimating the main loss parameters at powers down to the sub-photon regime and at temperatures between 10 and 450 mK. We compare films deposited by thermal evaporation, sputtering, and molecular beam epitaxy. We study the effects of heating in vacuum and ambient atmospheric pressure as well as the effects of pre-deposition wafer cleaning using hydrofluoric acid. The microwave measurements are supported by thin film metrology including secondary-ion mass spectrometry. For thermally evaporated and sputtered films, we find that two-level states (TLSs) are the dominating loss mechanism at low photon number and temperature. Thermally evaporated indium is determined to have a TLS loss tangent due to indium oxide of ∼ 5 × 10 −5 . The molecular beam epitaxial films show evidence of formation of a substantial indium-silicon eutectic layer, which leads to a drastic degradation in resonator performance.

Extensible quantum computing architectures require a large array of quantum devices operating with low error rates. A quantum processor based on superconducting quantum bits can be scaled up by stacking microchips that each perform different computational functions. In this article, we experimentally demonstrate a thermocompression bonding technology that utilizes indium films as a welding agent to attach pairs of lithographically-patterned chips. We perform chip-to-chip indium bonding in vacuum at 190 • C with indium film thicknesses of 150 nm. We characterize the dc and microwave performance of bonded devices at room and cryogenic temperatures. At 10 mK, we find a dc bond resistance of 515 nΩ mm −2 . Additionally, we show minimal microwave reflections and good transmission up to 6.8 GHz in a tunnel-capped, bonded device as compared to a similar uncapped device. As a proof of concept, we fabricate and measure a set of tunnelcapped superconducting resonators, demonstrating that our bonding technology can be used in quantum computing applications.

A practical quantum computer requires quantum bit(qubit) operations with low error probabilities in extensible architectures. We study a packaging method that makes it possible to address hundreds of superconducting qubits by means of coaxial Pogo pins. A qubit chip is housed in a superconducting box, where both box and chip dimensions lead to unwanted modes that can interfere with qubit operations. We analyze these interference effects in the context of qubit coherent leakage and qubit decoherence induced by damped modes. We propose two methods, half-wave fencing and antinode pinning, to mitigate the resulting errors by detuning the resonance frequency of the modes from the qubit frequency. We perform electromagnetic field simulations indicating that the resonance frequency of the modes increases with the number of installed pins and can be engineered to be significantly higher than the highest qubit frequency. We estimate that the error probabilities and decoherence rates due to suitably shifted modes in realistic scenarios can be up to two orders of magnitude lower than the state-of-the-art superconducting qubit error and decoherence rates. Our methods can be extended to different types of packages that do not rely on Pogo pins. Conductive bump bonds, for example, can serve the same purpose in qubit architectures based on flip chip technology. Metalized vias, instead, can be used to mitigate modes due to the increasing size of the dielectric substrate on which qubit arrays are patterned.