This paper focuses on issues related to energy efficient Digital Signal Processing (DSP) -taking a Systemsto-Silicon approach. This implies that achieving maximum energy efficiency in a DSP system is a distributed task from the systems level (compilers, algorithm design etc.) to a silicon (transistor, process technologies etc.) level. It addresses how we view this problem and also uses specific application areas such as hearing devices and medical imaging to illustrate the needs and concepts involved in this context.
Abstract-Functional coverage plays a pivotal role in assuring the quality of input stimuli used in the verification of modern digital designs. For an out-of-order multi-processor design, simulation of a detailed model of the design is often required to observe relevant design behaviors for functional coverage. However, since such a model is not available during the early phases of test development, verification teams are forced to wait until much later in the verification process to evaluate the quality of their test cases. Even then, the quality of the tests can be assured only on one specific design implementation -an undesirable characteristic for test and regression suites that are meant to be used across multiple generations and/or implementations of an architecture. This work addresses this issue by presenting a novel, implementation-independent, execution tracebased, coverage collection solution. Our solution enables the early evaluation of multi-processor tests using a high-level model of a design. In addition, it can be deployed with detailed design models, if desired, for further analysis alongside implementationspecific coverage models.
This paper presents some insights into the architecture of one o f Texas Instrument's (TI) most energy efficient Digital Signal Processor's (DSP), the TMS320C55x. It discusses key low-power architecture issues including the rationale used in making trade-offs that did not adversely affect performance while minimizing chip level power requirements. The paper also discusses some algorithm development centric issues to illustrate how algorithm level researchers can also contribute to the bottom line when it comes to decreasing power consumption o f a DSP system.
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