A novel manifestation of piezoelectric effects in GaAs has been observed. The change of barrier height, φB, of Schottky diodes induced by uniaxial stresses, S, along 〈100〉, 〈011〉, 〈01̄1〉, and 〈111〉 has been measured. Shifts in φB due to the appearance of piezoelectric polarization charges at the semiconductor-metal interface for directions other than 〈100〉 are observed.
Calculation of the Schottky barrier height at the Al/GaAs(001) heterojunction: Effect of interfacial atomic relaxations J.
We present experimental results of Al/n- and Al/p-type GaAs Schottky barrier structures grown in situ by molecular-beam epitaxy with thin Si epitaxial interfacial layers. The barrier heights are measured by the I-V, thermal activation, C-V, and photoresponse methods. Barrier heights in the range of 0.3<φbN<1.04 eV for n-type GaAs and 0.28 < φbP<1.01 eV for p-type GaAs were obtained for Si layer thicknesses between 6 and 100 Å. Annealing studies conducted on the samples indicate that the structures are thermally stable to temperatures up to 450 °C. These results imply that the GaAs surface Fermi level at the Si/GaAs interface is unpinned from its customary near-midgap value. A model which involves the energy-band discontinuities ΔEC and ΔEV between GaAs and Si, the thickness, and the doping of the Si layer is suggested to account for the different barrier-height values obtained.
Absrruct-An n-channel depletion-mode GaAs MESFET with an AI gate and a 6-K epitaxial Si layer between the metal and the GaAs, grown in situ by molecular beam epitaxy (MBE), is described. Its dc electrical characteristics are compared with a similar control structure grown without the Si layer. The gate leakage current in the Al/Si/GaAs MESFET's was three to four orders of magnitude lower than in the control structure, due to an increased barrier height in the AI/Si/n-GaAs Schottky gate of q5aN = 1.04 eV, versus q5bN = 0.78 eV for the Al/n-GaAs structure. The differences in threshold voltages, I-Y characteristics, and transconductances between the two devices are consistent with an enhanced effective bamer height for the AI/Si/GaAs MESFET.ECENTLY, we demonstrated that a thin Si epitaxial R ayer grown in situ by molecular beam epitaxy (MBE) between Al and GaAs could be used to vary the effective Schottky bamer height + b [l], [2]. Without such an interfacial layer, cpbN is usually fixed at about 0.8 eV in n-GaAs due to surface Fermi-level pinning, independent of the choice of gate metal. The effective bamer height in those studies was shown to be dependent on the thickness and growth conditions of the Si interfacial layer, as well as the conduction-band discontinuity AE, between Si and GaAs. +b's in the range of 0.3 < +bN < 1.04 eV for Al/Si/n-GaAs and 0.3 < + b p < 1.01 eV for Al/Si/p-GaAs were obtained, consistent with previous demonstrations of GaAs surface unpinning with a thin epitaxial Si layer in SiO,/Si/GaAs MOS devices [3], 141. Waldrop and Grant have also reported similar variations of effective barrier heights on n-GaAs with heavily doped Si layers deposited by thermal evaporation with other metal contacts [5], [6]. In our studies, the highest value of +bN was obtained with a 6-A epitaxial Si layer grown between Al and n-GaAs. In the proposed model [l], this value corresponds to the sum of the Al/Si bamer height and AE, (estimated in our work at 0.3 f 0.05 eV). The +bN = 1.04-eV barrier provided a reduction of about four orders of magnitude in the reverse saturation and forward currents when compared with Al/GaAs barriers (&N = 0.78 eV) grown without the Si interfacial layer. The ideality factor was n = 1.02 for the Al/GaAs barrier and n = 1.04 for the Manuscript received March 21, 1991.
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