This paper studies linear passive electrical networks with ideal switches. We employ the so-called linear switched systems framework in which these circuits can be analyzed for any given switch configuration. After providing a complete characterization of admissible inputs and consistent initial states with respect to a switch configuration, the paper introduces a new state reinitialization rule that is based on energy minimization at the time of switching. This new rule is proven to be equivalent to the classical methods of Laplace transform and charge/flux conservation principle. Also we illustrate the new rule on typical examples that have been treated in the literature.Index Terms-Consistent initial conditions, energy-based jump rule, state discontinuities, state jump, switched networks.

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energy funiction to provide a canonical network realization for a class of 141.

The time-domain sensitivity results of Director and Rohrer' are reexamined. It is shown that while ihe results are valid for an integralsquared performance-error gradient, they cannot be used for timedomain network sensitivities. Corrections to the sensitivity results are indicated.

Minaei, Shahram (Dogus Author) -- Göknar, İzzet Cem (Dogus Author) -- Conference full title: IEEE International Symposium on Circuits and Systems, ISCAS 2015; Lisbon; Portugal; 24 May 2015 through 27 May 2015In this paper, a new realization of a fully-differential (F-D) first-order all-pass filter (APF) operating in current mode (CM) is presented. In the proposed F-D CM APF a single adjustable current amplifier (ACA) and two current followers (CFS) with non-unity gain are used as active building blocks. Considering the input intrinsic resistance of CFS as useful active filter parameter, the proposed filter employs only a floating capacitor as external passive component. The pole frequency of the proposed resistorless circuit can be tuned via mutual change of input intrinsic resistance of CFS while the filter pass-band gain by means of gain of ACA. The theoretical results are verified by SPICE simulations, where TSMC 0.18 μm level-7 SCN018 CMOS process parameters were used