A simplified space vector modulation (SVM) technique is proposed for the seven-level cascaded H-bridge (CHB) inverter. It is based on decomposing the seven-level space vector hexagon into a number of two-level space vector hexagons. The presented technique significantly reduces the calculation time and efforts involved in the SVM of a seven-level inverter; without any loss in the output voltage magnitude or increase in the total harmonic distortion content. A further simplified technique is also presented in this study, which significantly reduces the complexity and effort involved in the seven-level SVM. Simulation results for the seven-level CHB inverter using the proposed techniques are presented. The results are compared with results using sinusoidal pulse-width modulation (PWM) and third harmonic injection PWM to prove the validity of the proposed techniques. The proposed technique is perfectly general and can be applied to all types of multilevel inverters and extended to higher level inverters.
This paper presents an optimized space vector pulse-width modulation (OSVPWM) technique for a five-level cascaded H-bridge (CHB) inverter. The space vector diagram of the five-level CHB inverter is optimized by resolving it into inner and outer two-level space vector hexagons. Unlike conventional space vector topology, the proposed technique significantly reduces the involved computational time and efforts without compromising the performance of the five-level CHB inverter. A further optimized (FOSVPWM) technique is also presented in this paper, which significantly reduces the complexity and computational efforts. The developed techniques are verified through MATLAB/SIMULINK. Results are compared with sinusoidal pulse-width modulation (SPWM) to prove the validity of the proposed technique. The proposed simulation system is realized by using an XC3S400 field-programmable gate array from Xilinx, Inc. The experiment results are then presented for verification.
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