SiO
x
(x ≈ 1)
is one of the most promising anode materials for application in secondary
lithium-ion batteries because of its high theoretical capacity. Despite
this merit, SiO
x
has a poor initial Coulombic
efficiency, which impedes its widespread use. To overcome this limitation,
in this work, we successfully demonstrate a novel synthesis of Mg-doped
SiO
x
via a mass-producible physical vapor
deposition method. The solid-state reaction between Mg and SiO
x
produces Si and electrochemically inert
magnesium silicate, thus increasing the initial Coulombic efficiency.
The Mg doping concentration determines the phase of the magnesium
silicate domains, the size of the Si domains, and the heterogeneity
of these two domains. Detailed electron microscopy and synchrotron-based
analysis revealed that the nanoscale homogeneity of magnesium silicates
driven by cycling significantly affected the lifetime. We found that
8 wt % Mg is the most optimized concentration for enhanced cyclability
because MgSiO3, which is the dominant magnesium silicate
composition, can be homogeneously mixed with silicon clusters, preventing
their aggregation during cycling and suppressing void formation.
Silicon is an attractive anode material for all-solid-state
batteries
(ASSBs) because it has a high energy density and is safer than metallic
lithium. Conventional silicon powder composite electrodes have significant
internal voids and detrimental interfaces that suppress the lithium
transport and lifetime. Here, we demonstrate that surface-treated
thin silicon wafers could serve as monolithic additive-free, electrolyte-free,
and void-free electrodes that can achieve high areal capacity at room
temperature (∼25 °C). A dense solid electrolyte interface
could effectively suppress the cracks and pulverization found in the
liquid electrolyte. We demonstrated that the grooved <110> wafer
exhibited reversible (de)lithiation owing to fast lithium distribution
along the <110> thickness direction. The surface groove could
effectively
penetrate the electrolyte layer, yielding a stable interfacial resistance
and homogeneous alloying/dealloying processes during cycling. Our
silicon wafer electrode achieved an areal capacity of 10 mAh cm–2 at room temperature, which can be improved by further
optimization.
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