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The emergence of wide-bandgap devices, e.g. silicon carbide (SiC), has the potential to enable very high-density power converter design with high-switching frequency operation capability. A comprehensive design tool with a holistic design approach is critical to maximise the overall system power density, e.g by identifying the optimal switching frequency. This paper presents a system level design tool that optimises the power density (volume or mass) of a 3-phase, 2-level DC-AC converter. The design tool optimises the selection of the devices, heatsink and passive components (including the design of the line, EMI and DC-link filters) to maximise the power density. The structure of the optimisation algorithm has been organised to reduce the number of potential design combinations by over 99%, and thus produces fast simulation times. The design tool predicts that when SiC devices are used instead of Si ones, the power density is increased by 159.4%. A 5 kW, 600 V DC-link, 3-phase, 2level DC-AC converter was experimentally evaluated in order to confirm the accuracy of the design tool.

Power devices based on wide-bandgap (WBG) material such as silicon-carbide (SiC) can operate at higher switching speeds, higher voltages and higher temperatures compared to those based on silicon (Si) material. This paper highlights some opportunities brought by SiC devices in existing and emerging applications in terms of efficiency and power density improvement. While the opportunities are clear, there are also design challenges that must be met in order to realize their full potential. For example, the fast switching speeds and high dv/dt of SiC devices can cause increased electromagnetic interference (EMI), current overshoot, cross-talk effect and have a negative impact on loads such as motors. This paper presents several potential solutions to tackle the application challenges and to fully exploit the superior characteristics of SiC devices and converters while attenuating their negative side-effects. This paper provides an overview of recent SiC device research and development activities based on academic literature, work carried out by the authors and collaborators as well as input from industry. It aims to provide benchmark results and a timely and useful reference to accelerate the adoption and deployment of SiC devices and converters.

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A four-level π-type converter is a Neutral Point Clamped (NPC) multilevel converter topology for low/medium voltage applications. As the inherent issue with this topology, the DC-link capacitor voltage balancing is challenging, especially when it operates as a single-end inverter/rectifier with unity power factor. This paper proposes a closed-loop DC-link voltage balancing algorithm of a π-type converter that is effective and simple to implement. In principle, this approach is based on Redundant Level Modulation (RLM). The RLM utilizes additional voltage levels in each switching window to gain extra controllability of the DC-link capacitor voltages without affecting the average output voltage. An algorithm based on mathematical and logical operations is developed to utilize RLM to achieve the closed-loop voltage balancing. The proposed control method is effective over the full modulation index (M = 0 ~ 1.15) and full power factor range (cos φ = 0 ~ 1). The algorithm is implemented in a test rig, and the experiment confirms its effectiveness.