been conceived as a rmltifunction device. ' Ihe Ec has been designed to work as the crosspoint element in a Brcadtend ARI (Asynchronous Transfer Mode) switch block, as well as an interfacing device betwecm a microprocessor, a codec or, in general. any data source and the All4 switch network. ' Ihe EC w o r k at a frequenol of 43.75 Mhz using a 16 data bits px-allel format. It implies a thmuglpt of 700 M.b.s. Ihe chip is implanented with l X OlOS gates, 4 Kbits of RAM memory and 25.5 Kbits of mF0 memory. The I.C. is dfacturated in 1.25 microns twin-tub double metal level standard cell OlOS technolcgy and has dimensions of 400 mils x 400 mils, with nominal power dissipation of 1.3 Watts.
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