Recently, wearable devices have become a prominent health care application domain by incorporating a growing number of sensors and adopting smart machine learning technologies. One closely related topic is the strategy of combining the wearable device technology with skill assessment, which can be used in wearable device apps for coaching and/or personal training. Particularly pertinent to skill assessment based on high-dimensional time series data from wearable sensors is classifying whether a player is an expert or a beginner, which skills the player is exercising, and extracting some low-dimensional representations useful for coaching. In this paper, we present a deep learning-based coaching assistant method, which can provide useful information in supporting table tennis practice. Our method uses a combination of LSTM (Long short-term memory) with a deep state space model and probabilistic inference. More precisely, we use the expressive power of LSTM when handling high-dimensional time series data, and state space model and probabilistic inference to extract low-dimensional latent representations useful for coaching. Experimental results show that our method can yield promising results for characterizing high-dimensional time series patterns and for providing useful information when working with wearable IMU (Inertial measurement unit) sensors for table tennis coaching.

Abstract:We propose a pipelined implementation of the eight-point Loeffler discrete cosine transform (DCT) for portable applications. The pipelined structure produces one DCT coefficient per clock cycle, which meets the limited memory bandwidth of many portable devices. Twodimensional algebraic integer (AI) encoding and the shift-and-add approach were used to make the implementation multiplication-free. A hardware cost reduction of approximately 40% was achieved by trading off the precision of the adders against a negligible amount of error in the reconstructed images.

External memory access exacts considerable timing and energy burdens from portable devices. However, most hardware accelerators for rendering two-dimensional (2D) vector graphics draw images in a path-based (path-by-path) manner, which frequently causes excessive external memory traffic. This paper proposes a scanline-based method for rendering 2D vector graphics in portable devices. The proposed method processes all paths spanning a scanline at a time, enabling the use of a scanline-sized internal frame buffer (FB). Using the internal FB, the accelerator can avoid repeated accesses to the external FB and reduce external memory access considerably for images in which many objects overlap with one another. Keywords: vector graphics, rendering, hardware accelerator, memory access Classification: Electron devices, circuits, and systems References

In this paper, we examine the wormhole routing problem in terms of the "congestion" c and "dilation"

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In this paper, we examine the packet routing problem for networks with wires of di ering length. We consider this problem in a network independent context, in which routing time is expressed in terms of \congestion" and \dilation" measures for a set of packet paths. We give, for any constant > 0, a randomized on-line algorithm for routing any set of N packets in O((C lg (Nd) + D lg(Nd))= lg lg(Nd)) time, where C is the maximum congestion and D is the length of the longest path, both taking wire delays into account, and d is the longest path in terms of number of wires. We also show that for edge-simple paths, there exists a schedule (which could be found o-line) of length O (cd max + D) lg(dmax) lg lg(dmax) , where d max is the maximum wire delay in the network. These results improve upon previous routing results which assume that unit time su ces to traverse a wire of any length. They also yield improved results for job-shop scheduling as long as we incorporate a technical restriction on the job-shop problem.

This letter proposes an efficient hardware accelerator of onedimensional (1D) eight-point Loeffler discrete cosine transform (DCT) for small portable devices. For continuous 1D input data streams, the accelerator uses only 13 adders and can calculate one DCT coefficient per clock cycle, which is the optimal throughput for the considered applications. Implementation results show that the accelerator can support real-time encoding of practical video sequences and can be a good alternative for small portable applications.