This letter presents a high frame rate and low area cost partial histogram scheme for d‐ToF depth imaging sensor based on SPAD. This scheme realizes high frame rate through a novel peak seeking algorithm based on gray code and pipeline operation that firstly adopted. Area cost is reduced by partial histogram and overlap is used to prevent data loss. Finally, a 24 bins partial‐histogram design is implemented by ASIC flow with a total area of 11724 μm2 under 130 nm. FPGA flow is also used to verify feasibility. Compared with other known partial histogram schemes, proposed method has no data and frame rate loss.
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