Optical imaging sensors suffer from distortions caused by atmospheric particles such as dust, mist, fog, haze, and smoke, resulting in degradation of object detection and recognition. To circumvent these issues, image dehazing is an essential preprocessing stage for various real time applications. Several conventional dehazing methods rely on the haze formation model that are inherently dependent on a large number of variables, requiring huge computational burden on the processor. This severely affects the dehazing performance and also restricts real time processing. To overcome these issues, this work deals with an end-to-end real time dehazing architecture based on light weight Convolutional Neural Network (CNN) and Generative Adversarial Network (GAN). Proposed depthwise seperable and residual (DSR) block has been used instead of convolution layers that significantly lowered the parameters and computations. Furthermore, sigmoid and bilateral ReLu activation functions have been exploited to prevent oversaturation of dehazed images. The proposed model achieves significant enhancements in peak signal-to-noise ratio (PSNR) and structural similarity index measure (SSIM) for both synthetic and real-world hazy images, when compared to other architectures such as dark channel prior (DCP) and DehazeNet. The performance outcome of CNN and GAN based dehazing architectures are analyzed and compared.
The rise in visual dataset generation has necessitated the recent advancements in the field of Deep Neural Networks (DNNs). Application domains like biomedical imaging require a high level of precision which is suitably achieved using convolutional neural networks (CNNs) at the expense of increased computation, hardware, and power resources. The implementation of such CNN architectures is constrained by currently available resource limited embedded and application-specific integrated circuit (ASIC) systems. In this work, a field-programmable gate array (FPGA) based hardware accelerator having a generalized architecture for convolution and fully connected (FC) layers has been presented that exploits a massive level of intra-layer parallelism. Compute intensive convolution layers are replaced by depthwise separable (DS) convolution layers that reduced the number of computations and memory access by 7.8x and 10x respectively for VGG8 network after detailed design space exploration. Furthermore, parallel computation of arithmetic tasks reduced the compute bound for the proposed architecture. Reduced precision data type for both input and weights resulted in overall reduction in latency and resource utilization. FPGA implementation results of the proposed CNN accelerator for classifiers trained on subsets of MedMNIST dataset depict a balance between high performance of 214.5 GOP/s for DS convolution layer and low resource utilization.
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