A light weight wireless communication stack based on wireless communication establishment. It handles data received over the air and send serially with security checking and acknowledgement. Also it transmits data over the air which is received serially with security checking and acknowledgement. It gives status of alive routers on coordinator's UART port.

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This Small Delay Tracing Defect Testing detect small delay defects by creating internal signal races. The races are created by launching transitions along simultaneous two paths, a reference path and a test path. The arrival times of the transitions on a ‘convergence’ or common gate determine the result of the race. On the output of the convergence gate, a static hazard created by a small delay defect presence on the test path which is directed to the input of a scan-latch. A glitch detector is added to the scan latch which records the presence or absence of the glitch.