This paper proposes IoT-based an enterprise health information system called IoTPulse to predict alcohol addiction providing real-time data using machine-learning in fog computing environment. We used data from 300 alcohol addicts from Punjab (India) as a case study to train machine-learning models. The performance of IoTPulse is compared against existing work using various parameters including accuracy, sensitivity, specificity and precision which shows improvement of 7%, 4%, 12% and 12% respectively. Finally, IoTPulse is validated in FogBus-based real fog environment using QoS parameters including latency, network bandwidth, energy and response time which improves performance by 19.56%, 18.36%, 19.53% and 21.56% respectively.

Since the end of 2019, computed tomography (CT) images have been used as an important substitute for the time‐consuming Reverse Transcriptase polymerase chain reaction (RT‐PCR) test; a new coronavirus 2019 (COVID‐19) disease has been detected and has quickly spread through many countries across the world. Medical imaging such as computed tomography provides great potential due to growing skepticism toward the sensitivity of RT‐PCR as a screening tool. For this purpose, automated image segmentation is highly desired for a clinical decision aid and disease monitoring. However, there is limited publicly accessible COVID‐19 image knowledge, leading to the overfitting of conventional approaches. To address this issue, the present paper focuses on data augmentation techniques to create synthetic data. Further, a framework has been proposed using WoT and traditional U‐Net with EfficientNet B0 to segment the COVID Radiopedia and Medseg datasets automatically. The framework achieves an F ‐score of 0.96, which is best among state‐of‐the‐art methods. The performance of the proposed framework also computed using Sensitivity, Specificity, and Dice‐coefficient, achieves 84.5%, 93.9%, and 65.0%, respectively. Finally, the proposed work is validated using three quality of service (QoS) parameters such as server latency, response time, and network latency which improves the performance by 8%, 7%, and 10%, respectively.

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Manufacturing of semiconductor devices at the sub-micron level has led to the introduction of huge number of faults. To ensure the quality of integrated circuits (ICs), enormous amount of test data is needed which, in turn, increases the overall test cost of the ICs. This study presents a hierarchical block-merging-based technique (HBMT) for test data compression, which appropriately encodes the test pattern blocks of fixed sizes at inter-and intra-block levels using lesser number of bits. The proposed technique works in four steps: segmentation of the entire length of test data into equal length blocks; categorisation of test blocks as compatible blocks and unique blocks; merging of compatible blocks to form representative pattern block, which is further merged at sub-block level; and compression of the non-compatible (unique) blocks using different encoding cases. Experimental results performed on various international symposium for circuits and systems (ISCAS)' 89 benchmark circuits demonstrate the effectiveness of the proposed test data compression technique. It is found that application of HBMT can improve the compression efficiency by an average of 73% along with a reduction in the test application time. This study also presents the decoder architecture.

Test data has increased enormously owing to the rising on-chip complexity of integrated circuits. It further increases the test data transportation time and tester memory. The non-correlated test bits increase the issue of the test power. This paper presents a two-stage block merging based test data minimization scheme which reduces the test bits, test time and test power. A test data is partitioned into blocks of fixed sizes which are compressed using two-stage encoding technique. In stage one, successive blocks are merged to retain a representative block. In stage two, the retained pattern block is further encoding based on the existence of ten different subcases between the sub-block formed by splitting the retained pattern block into two halves. Noncompatible blocks are also split into two sub-blocks and tried for encoded using lesser bits. Decompression architecture to retrieve the original test data is presented. Simulation results obtained corresponding to different ISCAS'89 benchmarks circuits reflect its effectiveness in achieving better compression.