Most oxide ceramics are known to be brittle macroscopically at room temperature with little or no dislocation‐based plasticity prior to crack propagation. Here, we demonstrate the size‐dependent brittle to ductile transition in SrTiO3 at room temperature using nanoindentation pop‐in events visible as a sudden increase in displacement at nominally constant load. We identify that the indentation pop‐in event in SrTiO3 at room temperature, below a critical indenter tip radius, is dominated by dislocation‐mediated plasticity. When the tip radius increases to a critical size, concurrent dislocation activation and crack formation, with the latter being the dominating process, occur during the pop‐in event. Beyond the experimental examination and theoretical justification presented on SrTiO3 as a model system, further validation on α‐Al2O3, BaTiO3, and TiO2 are briefly presented and discussed. A new indentation size effect, mainly for brittle ceramics, is suggested by the competition between the dislocation‐based plasticity and crack formation at small scale. Our finding complements the deformation mechanism in the nano‐/microscale deformation regime involving plasticity and cracking in ceramics at room temperature to pave the road for dislocation‐based mechanics and functionalities study in these materials.
Grain boundaries
(GBs) in metals usually increase electrical resistivity
due to their distinct atomic arrangement compared to the grain interior.
While the GB structure has a crucial influence on the electrical properties,
its relationship with resistivity is poorly understood. Here, we perform
a systematic study on the resistivity–structure relationship
in Cu tilt GBs, employing high-resolution in situ electrical measurements coupled with atomic structure analysis of
the GBs. Excess volume and energies of selected GBs are calculated
using molecular dynamics simulations. We find a consistent relation
between the coincidence site lattice (CSL) type of the GB and its
resistivity. The most resistive GBs are in the high range of low-angle
GBs (14°–18°) with twice the resistivity of high
angle tilt GBs, due to the high dislocation density and corresponding
strain fields. Regarding the atomistic structure, GB resistivity approximately
correlates with the GB excess volume. Moreover, we show that GB curvature
increases resistivity by ∼80%, while phase variations and defects
within the same CSL type do not considerably change it.
It
is well-known that grain boundaries (GBs) increase the electrical
resistivity of metals due to their enhanced electron scattering. The
resistivity values of GBs are determined by their atomic structure;
therefore, assessing the local resistivity of GBs is highly significant
for understanding structure–property relationships. So far,
the local electrical characterization of an individual GB has not
received much attention, mainly due to the limited accuracy of the
applied techniques, which were not sensitive enough to detect the
subtle differences in electrical resistivity values of highly symmetric
GBs. Here, we introduce a detailed methodology to probe
in
situ
or
ex situ
the local resistivity of
individual GBs in Cu, a metallic model system we choose due to its
low resistance. Both bulk Cu samples and thin films are investigated,
and different approaches to obtain reliable and accurate resistivity
measurements are described, involving the van der Pauw technique for
macroscopic measurements as well as two different four-point-probe
techniques for local
in situ
measurements performed
inside a scanning electron microscope. The
in situ
contacts are realized with needles accurately positioned by piezodriven
micromanipulators. Resistivity results obtained on coincidence site
lattice GBs (incoherent Σ3 and asymmetric Σ5) are reported
and discussed. In addition, the key experimental details as well as
pitfalls in the measurement of individual GB resistivity are addressed.
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