Articles you may be interested inResponse to "Comment on 'Carrier trapping and current collapse mechanism in GaN metal-semiconductor field effect transistors'" [Appl. Phys. Lett.86, 016101 (2005)] Appl. Phys. Lett. 86, 016102 (2005); 10.1063/1.1844604 Photoionization cross-section analysis for a deep trap contributing to current collapse in GaN field-effect transistors J. Appl. Phys. 96, 715 (2004); 10.1063/1.1753076Carrier trapping and current collapse mechanism in GaN metal-semiconductor field-effect transistors
Mechanisms of current collapse and gate leakage currents in AlGaN/GaN heterostructure field effect transistorsTwo-dimensional transient analyses of GaN metal-semiconductor field effect transistors ͑MESFETs͒ are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor, and a deep acceptor are included. Quasipulsed current-voltage ͑I-V͒ curves are derived from the transient characteristics and are compared with steady-state I-V curves. It is shown that when the drain voltage V D is raised abruptly, the drain current I D overshoots the steady-state value, and when V D is lowered abruptly, I D remains at a low value for some periods, showing drain-lag behavior. These are explained by the deep donor's electron capturing and electron emission processes quantitatively. The drain lag could be a major cause of current collapse, although some gate lag is also seen due to the buffer layer. The current collapse is shown to be more pronounced when the deep-acceptor density in the buffer layer is higher and when an off-state drain voltage is higher, because the change of ionized deep-donor density becomes larger and hence the trapping effects become more significant. It is suggested that to minimize the current collapse in GaN-based FETs, an acceptor density in a semi-insulating layer should be made low, although the current cutoff behavior may be degraded.
Two-dimensional transient simulations of GaNMESFETs are performed in which a three-level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are considered. When the drain voltage V D is raised abruptly (while keeping the gate voltage V G constant), the drain current I D overshoots the steady-state value, and when V D is lowered abruptly, I D remains a low value for some periods, showing drain-lag behavior. These are explained by the deep donor's electron capturing and electron emission processes. We also calculate a case when both V D and V G are changed abruptly from an off point, and quasi-pulsed I-V curves are derived from the transient characteristics. It is shown that the drain currents in the pulsed I-V curves are rather lower than those in the steady state, indicating that so-called current collapse could occur due to deep levels in the semi-insulating buffer layer. It is also shown that the current collapse is more pronounced when V D is lowered from a higher voltage during turn-on, because the trapping effects become more significant.
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