Abstract-Power delivery network (PDN) is a distributed resistance-inductance-capacitance (RLC) network with its dominant resonance frequency in the low-to-middle frequency range. Though high-performance chips' working frequencies are much higher than this resonance frequency in general, chip runtime loading frequency is not. When a chip executes a chunk of instructions repeatedly, the induced current load may have harmonic components close to this resonance frequency, causing excessive power integrity degradation. Existing PDN design solutions are, however, mainly targeted at reducing high-frequency noise and not effective to suppress such resonance noise. In this work, we propose a novel approach to proactively suppress this type of noise. A method based on the high dimension generalized Markov process is developed to predict current load variation. Based on such prediction, a clock frequency actuator design is proposed to proactively select an optimal clock frequency to suppress the resonance. To the best of our knowledge, this is the first in-depth study on proactively reducing instruction loop induced PDN resonance noise at the runtime.
In free electron laser (FEL) systems with ultraviolet (UV) laser driven injectors, a highly stable UV source generated through cascaded third harmonic generation (THG) from an infrared (IR) source is a key element in guaranteeing the acceptable current jitter at the undulator. In this letter, the negative slope of the THG efficiency for high intensity ultrashort IR pulses is revealed to be a passive stabilization mechanism for energy jitter reduction in UV. A reduction of 2.5 times the energy jitter in UV is demonstrated in the experiment and simulations show that the energy jitter in UV can be reduced by more than one order of magnitude if the energy jitter in IR is less than 3%, with proper design of the THG efficiency curve, fulfilling the challenging requirement for UV laser stability in a broad scope of applications such as the photoinjector of x-ray FELs.
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